op | inst | notes
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0x00 000000 | | i-format instruction
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0x01 000001 | | floating-point instruction (ignore)
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jump
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0x02 000010 | j label | absolute addressing
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0x03 000011 | jal label | $31 <- PC
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branch
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0x04 000100 | beqz $r1, label | PC+4-relative addressing
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0x05 000101 | bnez $r1, label
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0x06 000110 | bfpt | floating-point, not implemented
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0x07 000111 | bfpf
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ALU immediate
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0x08 001000 | addi $rd, $rs, immed
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0x09 001001 | addui
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0x0a 001010 | subi
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0x0b 001011 | subui
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0x0c 001100 | andi $rd, $rs, immed | $rd = $rs & immed
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0x0d 001101 | ori
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0x0e 001110 | xori
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0x0f 001111 | lhi $rd, immed | $rd[31:16] = immed[15:0]
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Exceptions
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0x10 010000 | rfe | not yet
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0x11 010001 | trap | not yet
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jump register
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0x12 010010 | jr $31
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0x13 010011 | jalr $29 | $31 <- PC
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ALU: shift immediate
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0x14 010100 | slli
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0x15 010110 | srli
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0x16 010111 | srai
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Set-on-condition immediate
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0x18 011000 | seqi $rd, $r1, $r2 | $rd <- 1 if $r1==$r2
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0x19 011001 | snei
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0x1a 011010 | slti
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0x1b 011011 | sgti
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0x1c 011100 | slei
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0x1d 011101 | sgei
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load/store (aligned only)
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0x23 100011 | lw $reg, offset($rbase) | $reg <- Mem[$rbase+offset]
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0x2b 101011 | sw $reg, offset($rbase) | Mem[$rbase+offset] <- $reg
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Set-on-condition immediate unsigned
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0x30 110000 | sequi
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0x31 110001 | sneui
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0x32 110010 | sltui
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0x33 110011 | sgtui
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0x34 110100 | sleui
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0x35 110101 | sgeui
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