//: version "1.6g"
//: script "/home/xidus/mips/dlx.gss"


module jtarg(Z, PC, IR);
//: interface  /sz:(63, 40) /bd:[ Li0>IR[31:0](5/40) Li1>PC[31:0](23/40) Ro0<Z[31:0](15/40) ]
input [31:0] IR;    //: /sn:0 {0}(156,241)(122,241){1}
input [31:0] PC;    //: /sn:0 {0}(173,201)(134,201){1}
supply0 [1:0] w3;    //: /sn:0 {0}(257,282)(257,256)(284,256){1}
output [31:0] Z;    //: /sn:0 /dp:1 {0}(290,246)(310,246){1}
wire [5:0] w6;    //: /sn:0 {0}(172,236)(162,236){1}
wire [27:0] w4;    //: /sn:0 {0}(189,206)(179,206){1}
wire [25:0] w0;    //: /sn:0 {0}(162,246)(284,246){1}
wire [3:0] w5;    //: /sn:0 /dp:1 {0}(179,196)(235,196)(235,236)(284,236){1}
//: enddecls

  concat g4 (.I0(w4), .I1(w5), .Z(PC));   //: @(174,201) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1
  concat g3 (.I0(w3), .I1(w0), .I2(w5), .Z(Z));   //: @(289,246) /sn:0 /w:[ 1 1 1 0 ] /dr:0
  //: output g2 (Z) @(307,246) /sn:0 /w:[ 1 ]
  //: input g1 (PC) @(132,201) /sn:0 /w:[ 1 ]
  concat g6 (.I0(w0), .I1(w6), .Z(IR));   //: @(157,241) /sn:0 /R:2 /w:[ 0 1 0 ] /dr:1
  //: supply0 g5 (w3) @(257,288) /sn:0 /w:[ 0 ]
  //: input g0 (IR) @(120,241) /sn:0 /w:[ 1 ]

endmodule

module add_16(B, CI, Z, O, C, A);
//: interface  /sz:(78, 85) /bd:[ Ti0>CI(37/78) Li0>B[15:0](68/85) Li1>A[15:0](9/85) Bo0<C(36/78) Ro0<Z[15:0](25/85) Ro1<O(70/85) ]
input [15:0] B;    //: /sn:0 {0}(126,134)(168,134){1}
input [15:0] A;    //: /sn:0 {0}(131,73)(166,73){1}
output [15:0] Z;    //: /sn:0 /dp:1 {0}(676,105)(724,105){1}
input CI;    //: /sn:0 {0}(331,43)(374,43){1}
//: {2}(378,43)(597,43)(597,131){3}
//: {4}(376,45)(376,104){5}
output O;    //: /sn:0 /dp:1 {0}(620,-33)(658,-33){1}
output C;    //: /sn:0 {0}(593,474)(593,509)(623,509){1}
wire [3:0] w32;    //: /sn:0 {0}(406,317)(470,317)(470,100)(670,100){1}
wire [2:0] w6;    //: /sn:0 {0}(434,12)(424,12){1}
wire w7;    //: /sn:0 {0}(424,2)(461,2)(461,-43)(494,-43){1}
//: {2}(498,-43)(544,-43){3}
//: {4}(496,-41)(496,-21)(544,-21){5}
wire w14;    //: /sn:0 {0}(641,200)(631,200){1}
wire w15;    //: /sn:0 {0}(641,218)(631,218){1}
wire [3:0] w4;    //: /sn:0 {0}(416,-42)(289,-42)(289,56){1}
//: {2}(287,58)(172,58){3}
//: {4}(289,60)(289,414)(341,414){5}
wire [3:0] w0;    //: /sn:0 {0}(341,124)(324,124)(324,88)(172,88){1}
wire w3;    //: /sn:0 {0}(422,-47)(502,-47){1}
//: {2}(506,-47)(544,-47){3}
//: {4}(504,-45)(504,-25)(544,-25){5}
wire w34;    //: /sn:0 {0}(559,353)(406,353){1}
wire w21;    //: /sn:0 {0}(559,143)(408,143){1}
wire [3:0] w31;    //: /sn:0 {0}(341,321)(299,321)(299,68)(172,68){1}
wire w28;    //: /sn:0 {0}(559,253)(406,253){1}
wire w20;    //: /sn:0 {0}(565,-21)(589,-21)(589,-31)(599,-31){1}
wire w23;    //: /sn:0 {0}(559,182)(375,182)(375,201){1}
wire [3:0] w24;    //: /sn:0 {0}(341,246)(252,246)(252,139)(174,139){1}
wire [2:0] w1;    //: /sn:0 {0}(432,-37)(422,-37){1}
wire [3:0] w25;    //: /sn:0 {0}(341,221)(310,221)(310,78)(172,78){1}
wire w35;    //: /sn:0 {0}(559,381)(375,381)(375,394){1}
wire w40;    //: /sn:0 {0}(559,446)(406,446){1}
wire [3:0] w8;    //: /sn:0 {0}(418,7)(232,7)(232,117){1}
//: {2}(230,119)(174,119){3}
//: {4}(232,121)(232,439)(341,439){5}
wire [3:0] w30;    //: /sn:0 {0}(341,346)(242,346)(242,129)(174,129){1}
wire w17;    //: /sn:0 {0}(565,-43)(589,-43)(589,-36)(599,-36){1}
wire w22;    //: /sn:0 {0}(559,156)(408,156){1}
wire w12;    //: /sn:0 {0}(529,7)(511,7)(511,-16){1}
//: {2}(513,-18)(544,-18){3}
//: {4}(511,-20)(511,-40)(544,-40){5}
wire [2:0] w10;    //: /sn:0 {0}(519,17)(529,17){1}
wire w27;    //: /sn:0 {0}(559,240)(406,240){1}
wire [3:0] w13;    //: /sn:0 {0}(535,12)(620,12)(620,88){1}
//: {2}(622,90)(670,90){3}
//: {4}(618,90)(481,90)(481,410)(406,410){5}
wire [3:0] w5;    //: /sn:0 {0}(341,149)(174,149){1}
wire w33;    //: /sn:0 {0}(559,340)(406,340){1}
wire w29;    //: /sn:0 {0}(559,283)(375,283)(375,301){1}
wire [3:0] w9;    //: /sn:0 {0}(408,120)(670,120){1}
wire [3:0] w26;    //: /sn:0 {0}(406,217)(457,217)(457,110)(670,110){1}
wire w39;    //: /sn:0 {0}(559,433)(406,433){1}
//: enddecls

  add_4 g4 (.CI(CI), .A(w0), .B(w5), .p(w22), .g(w21), .S(w9));   //: @(342, 105) /sz:(65, 63) /sn:0 /p:[ Ti0>5 Li0>0 Li1>0 Ro0<1 Ro1<1 Ro2<0 ]
  concat g8 (.I0(w9), .I1(w26), .I2(w32), .I3(w13), .Z(Z));   //: @(675,105) /sn:0 /w:[ 1 1 1 3 0 ] /dr:0
  concat g3 (.I0(w5), .I1(w24), .I2(w30), .I3(w8), .Z(B));   //: @(169,134) /sn:0 /R:2 /w:[ 1 1 1 3 1 ] /dr:1
  add_4 g13 (.CI(w23), .A(w25), .B(w24), .p(w28), .g(w27), .S(w26));   //: @(342, 202) /sz:(63, 63) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Ro0<1 Ro1<1 Ro2<0 ]
  concat g2 (.I0(w0), .I1(w25), .I2(w31), .I3(w4), .Z(A));   //: @(167,73) /sn:0 /R:2 /w:[ 1 1 1 3 1 ] /dr:1
  //: input g1 (B) @(124,134) /sn:0 /w:[ 0 ]
  //: joint g16 (CI) @(376, 43) /w:[ 2 -1 1 4 ]
  and g11 (.I0(w3), .I1(w7), .I2(!w12), .Z(w17));   //: @(555,-43) /sn:0 /w:[ 3 3 5 0 ]
  or g10 (.I0(w17), .I1(w20), .Z(O));   //: @(610,-33) /sn:0 /w:[ 1 1 0 ]
  concat g19 (.I0(w10), .I1(w12), .Z(w13));   //: @(534,12) /sn:0 /w:[ 1 0 0 ] /dr:0
  //: input g6 (CI) @(329,43) /sn:0 /tech:unit /w:[ 0 ]
  //: output g7 (Z) @(721,105) /sn:0 /w:[ 1 ]
  //: output g9 (O) @(655,-33) /sn:0 /w:[ 1 ]
  add_4 g15 (.CI(w35), .A(w4), .B(w8), .p(w40), .g(w39), .S(w13));   //: @(342, 395) /sz:(63, 63) /sn:0 /p:[ Ti0>1 Li0>5 Li1>5 Ro0<1 Ro1<1 Ro2<5 ]
  //: joint g20 (w3) @(504, -47) /w:[ 2 -1 1 4 ]
  concat g17 (.I0(w1), .I1(w3), .Z(w4));   //: @(417,-42) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1
  //: joint g25 (w4) @(289, 58) /w:[ -1 1 2 4 ]
  CLA_4 g5 (.c1(CI), .p4(w40), .g4(w39), .p3(w34), .g3(w33), .p2(w28), .g2(w27), .p1(w22), .g1(w21), .c4(w35), .c3(w29), .c2(w23), .C(C), .gp(w15), .gg(w14));   //: @(560, 132) /sz:(70, 341) /sn:0 /p:[ Ti0>3 Li0>0 Li1>0 Li2>0 Li3>0 Li4>0 Li5>0 Li6>0 Li7>0 Lo0<0 Lo1<0 Lo2<0 Bo0<0 Ro0<1 Ro1<1 ]
  add_4 g14 (.CI(w29), .A(w31), .B(w30), .p(w34), .g(w33), .S(w32));   //: @(342, 302) /sz:(63, 63) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Ro0<1 Ro1<1 Ro2<0 ]
  //: joint g21 (w7) @(496, -43) /w:[ 2 -1 1 4 ]
  //: joint g24 (w8) @(232, 119) /w:[ -1 1 2 4 ]
  //: joint g23 (w13) @(620, 90) /w:[ 2 1 4 -1 ]
  //: output g26 (C) @(620,509) /sn:0 /w:[ 1 ]
  //: input g0 (A) @(129,73) /sn:0 /w:[ 0 ]
  //: joint g22 (w12) @(511, -18) /w:[ 2 4 -1 1 ]
  and g12 (.I0(!w3), .I1(!w7), .I2(w12), .Z(w20));   //: @(555,-21) /sn:0 /w:[ 5 5 3 0 ]
  concat g18 (.I0(w6), .I1(w7), .Z(w8));   //: @(419,7) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1

endmodule

module shift_32(Op, Z, B, A);
//: interface  /sz:(83, 70) /bd:[ Ti0>Op[2:0](41/83) Li0>B[31:0](49/70) Li1>A[31:0](14/70) Ro0<Z[31:0](15/70) ]
input [31:0] B;    //: /sn:0 {0}(148,252)(199,252){1}
input [31:0] A;    //: /sn:0 /dp:1 {0}(346,191)(346,155)(290,155){1}
//: {2}(286,155)(158,155){3}
//: {4}(288,157)(288,236){5}
//: {6}(290,238)(437,238){7}
//: {8}(288,240)(288,251){9}
//: {10}(290,253)(342,253)(342,270){11}
//: {12}(288,255)(288,337)(342,337)(342,347){13}
output [31:0] Z;    //: /sn:0 /dp:1 {0}(466,244)(560,244){1}
input [2:0] Op;    //: /sn:0 {0}(391,112)(365,112){1}
wire [1:0] w7;    //: /sn:0 {0}(397,117)(453,117)(453,221){1}
wire [31:0] w15;    //: /sn:0 {0}(342,368)(342,376)(418,376)(418,262)(437,262){1}
wire [26:0] w1;    //: /sn:0 {0}(215,247)(205,247){1}
wire w8;    //: /sn:0 {0}(407,107)(397,107){1}
wire [31:0] w12;    //: /sn:0 {0}(342,291)(342,299)(403,299)(403,250)(437,250){1}
wire [4:0] w10;    //: /sn:0 {0}(309,201)(262,201)(262,255){1}
//: {2}(260,257)(205,257){3}
//: {4}(262,259)(262,278){5}
//: {6}(264,280)(305,280){7}
//: {8}(262,282)(262,357)(305,357){9}
wire [31:0] w9;    //: /sn:0 {0}(346,212)(346,226)(437,226){1}
//: enddecls

  //: input g4 (Op) @(363,112) /sn:0 /w:[ 1 ]
  rshift g8 (.I(A), .Z(w12), .S(w10));   //: @(342,280) /sn:0 /w:[ 11 0 7 ]
  //: output g3 (Z) @(557,244) /sn:0 /w:[ 1 ]
  //: joint g13 (A) @(288, 253) /w:[ 10 9 -1 12 ]
  concat g2 (.I0(w10), .I1(w1), .Z(B));   //: @(200,252) /sn:0 /R:2 /w:[ 3 1 1 ] /dr:1
  //: input g1 (B) @(146,252) /sn:0 /w:[ 0 ]
  //: joint g11 (w10) @(262, 280) /w:[ 6 5 -1 8 ]
  //: joint g10 (w10) @(262, 257) /w:[ -1 1 2 4 ]
  concat g6 (.I0(w7), .I1(w8), .Z(Op));   //: @(392,112) /sn:0 /R:2 /w:[ 0 1 0 ] /dr:1
  lshift g7 (.I(A), .Z(w9), .S(w10));   //: @(346,201) /sn:0 /w:[ 0 0 0 ]
  arshift g9 (.I(A), .Z(w15), .S(w10));   //: @(342,357) /sn:0 /w:[ 13 0 9 ]
  mux g5 (.I0(w9), .I1(A), .I2(w12), .I3(w15), .S(w7), .Z(Z));   //: @(453,244) /sn:0 /R:1 /w:[ 1 7 1 1 1 0 ]
  //: joint g14 (A) @(288, 238) /w:[ 6 5 -1 8 ]
  //: input g0 (A) @(156,155) /sn:0 /w:[ 3 ]
  //: joint g12 (A) @(288, 155) /w:[ 1 -1 2 4 ]

endmodule

module cond(CC, sign, zero, over, Cond, neg);
//: interface  /sz:(63, 59) /bd:[ Ti0>CC[2:0](39/63) Li0>zero(5/59) Li1>neg(17/59) Li2>over(38/59) Bi0>sign(54/63) Ro0<Cond(37/59) ]
input sign;    //: /sn:0 {0}(94,156)(129,156)(129,185){1}
input [2:0] CC;    //: /sn:0 {0}(214,103)(362,103)(362,190){1}
input zero;    //: /sn:0 {0}(203,191)(214,191){1}
//: {2}(218,191)(346,191){3}
//: {4}(216,193)(216,198){5}
//: {6}(218,200)(227,200){7}
//: {8}(216,202)(216,246)(229,246){9}
input over;    //: /sn:0 {0}(75,218)(113,218){1}
input neg;    //: /sn:0 {0}(75,198)(113,198){1}
output Cond;    //: /sn:0 /dp:1 {0}(375,213)(426,213){1}
wire w6;    //: /sn:0 {0}(243,200)(252,200){1}
//: {2}(256,200)(346,200){3}
//: {4}(254,202)(254,214)(262,214){5}
wire w7;    //: /sn:0 {0}(142,208)(163,208){1}
//: {2}(167,208)(346,208){3}
//: {4}(165,210)(165,217){5}
//: {6}(167,219)(177,219){7}
//: {8}(165,221)(165,251)(229,251){9}
wire w3;    //: /sn:0 {0}(250,249)(298,249)(298,225)(346,225){1}
wire w8;    //: /sn:0 {0}(283,217)(346,217){1}
wire w5;    //: /sn:0 /dp:1 {0}(262,219)(234,219){1}
//: {2}(230,219)(193,219){3}
//: {4}(232,221)(232,234)(346,234){5}
//: enddecls

  not g8 (.I(zero), .Z(w6));   //: @(233,200) /sn:0 /w:[ 7 0 ]
  //: input g4 (CC) @(212,103) /sn:0 /w:[ 0 ]
  and g13 (.I0(w6), .I1(w5), .Z(w8));   //: @(273,217) /sn:0 /w:[ 5 0 0 ]
  //: input g3 (sign) @(92,156) /sn:0 /w:[ 0 ]
  //: input g2 (zero) @(201,191) /sn:0 /w:[ 0 ]
  //: input g1 (over) @(73,218) /sn:0 /w:[ 0 ]
  //: joint g16 (zero) @(216, 200) /w:[ 6 5 -1 8 ]
  not g11 (.I(w7), .Z(w5));   //: @(183,219) /sn:0 /w:[ 7 3 ]
  //: comment g10 /dolink:0 /link:"" @(48,136) /sn:0
  //: /line:"1=unsigned"
  //: /end
  mux g6 (.I0(zero), .I1(w6), .I2(w7), .I3(w8), .I4(w3), .I5(w5), .S(CC), .Z(Cond));   //: @(362,213) /sn:0 /R:1 /w:[ 3 3 3 1 1 5 1 0 ]
  //: joint g9 (zero) @(216, 191) /w:[ 2 -1 1 4 ]
  mux g7 (.I0(neg), .I1(over), .S(sign), .Z(w7));   //: @(129,208) /sn:0 /R:1 /w:[ 1 1 1 0 ]
  or g15 (.I0(zero), .I1(w7), .Z(w3));   //: @(240,249) /sn:0 /w:[ 9 9 0 ]
  //: joint g17 (w7) @(165, 219) /w:[ 6 5 -1 8 ]
  //: joint g14 (w6) @(254, 200) /w:[ 2 -1 1 4 ]
  //: output g5 (Cond) @(423,213) /sn:0 /w:[ 1 ]
  //: input g0 (neg) @(73,198) /sn:0 /w:[ 0 ]
  //: joint g18 (w5) @(232, 219) /w:[ 1 -1 2 4 ]
  //: joint g12 (w7) @(165, 208) /w:[ 2 -1 1 4 ]

endmodule

module full(g, S, CI, B, p, A);
//: interface  /sz:(63, 59) /bd:[ Ti0>CI(32/63) Li0>B(47/59) Li1>A(18/59) Ro0<g(37/59) Ro1<p(50/59) Ro2<S(12/59) ]
output p;    //: /sn:0 /dp:1 {0}(221,126)(234,126){1}
//: {2}(238,126)(256,126){3}
//: {4}(236,128)(236,206)(323,206){5}
input B;    //: /sn:0 {0}(154,173)(188,173){1}
//: {2}(192,173)(272,173){3}
//: {4}(190,171)(190,128)(200,128){5}
input A;    //: /sn:0 {0}(161,123)(176,123){1}
//: {2}(180,123)(200,123){3}
//: {4}(178,125)(178,168)(272,168){5}
input CI;    //: /sn:0 {0}(159,196)(249,196)(249,131)(256,131){1}
output S;    //: /sn:0 /dp:1 {0}(277,129)(323,129){1}
output g;    //: /sn:0 /dp:1 {0}(293,171)(328,171){1}
//: enddecls

  //: joint g8 (p) @(236, 126) /w:[ 2 -1 1 4 ]
  //: output g4 (g) @(325,171) /sn:0 /w:[ 1 ]
  //: output g3 (S) @(320,129) /sn:0 /w:[ 1 ]
  //: input g2 (CI) @(157,196) /sn:0 /w:[ 0 ]
  //: input g1 (B) @(152,173) /sn:0 /w:[ 0 ]
  //: joint g11 (B) @(190, 173) /w:[ 2 4 1 -1 ]
  //: joint g10 (A) @(178, 123) /w:[ 2 -1 1 4 ]
  xor g6 (.I0(A), .I1(B), .Z(p));   //: @(211,126) /sn:0 /w:[ 3 5 0 ]
  and g9 (.I0(A), .I1(B), .Z(g));   //: @(283,171) /sn:0 /w:[ 5 3 0 ]
  xor g7 (.I0(p), .I1(CI), .Z(S));   //: @(267,129) /sn:0 /w:[ 3 1 0 ]
  //: output g5 (p) @(320,206) /sn:0 /w:[ 5 ]
  //: input g0 (A) @(159,123) /sn:0 /w:[ 0 ]

endmodule

module add_4(p, B, S, CI, A, g);
//: interface  /sz:(65, 63) /bd:[ Ti0>CI(34/65) Li0>B[3:0](44/63) Li1>A[3:0](19/63) Ro0<S[3:0](15/63) Ro1<g(38/63) Ro2<p(51/63) ]
output p;    //: /sn:0 /dp:1 {0}(623,223)(661,223){1}
input [3:0] B;    //: /sn:0 {0}(88,143)(150,143){1}
input [3:0] A;    //: /sn:0 {0}(89,84)(150,84){1}
input CI;    //: /sn:0 {0}(256,38)(329,38){1}
//: {2}(333,38)(589,38)(589,136){3}
//: {4}(331,40)(331,110){5}
output [3:0] S;    //: /sn:0 /dp:1 {0}(615,70)(673,70){1}
output g;    //: /sn:0 /dp:1 {0}(623,205)(657,205){1}
wire w16;    //: /sn:0 {0}(298,226)(265,226)(265,89)(156,89){1}
wire w19;    //: /sn:0 /dp:1 {0}(363,258)(551,258){1}
wire w15;    //: /sn:0 {0}(298,255)(207,255)(207,148)(156,148){1}
wire w0;    //: /sn:0 {0}(298,129)(274,129)(274,99)(156,99){1}
wire w43;    //: /sn:0 {0}(551,386)(331,386)(331,400){1}
wire w21;    //: /sn:0 {0}(298,355)(198,355)(198,138)(156,138){1}
wire w31;    //: /sn:0 /dp:1 {0}(363,451)(551,451){1}
wire w28;    //: /sn:0 {0}(298,419)(241,419)(241,69)(156,69){1}
wire w41;    //: /sn:0 {0}(551,187)(331,187)(331,207){1}
wire w24;    //: /sn:0 /dp:1 {0}(363,345)(551,345){1}
wire w23;    //: /sn:0 {0}(363,320)(491,320)(491,65)(609,65){1}
wire w25;    //: /sn:0 /dp:1 {0}(363,358)(551,358){1}
wire w18;    //: /sn:0 /dp:1 {0}(363,245)(551,245){1}
wire w30;    //: /sn:0 /dp:1 {0}(363,438)(551,438){1}
wire w22;    //: /sn:0 {0}(298,326)(254,326)(254,79)(156,79){1}
wire w17;    //: /sn:0 {0}(363,220)(479,220)(479,75)(609,75){1}
wire w44;    //: /sn:0 {0}(585,489)(585,479){1}
wire w12;    //: /sn:0 /dp:1 {0}(363,148)(551,148){1}
wire w2;    //: /sn:0 {0}(363,123)(470,123)(470,85)(609,85){1}
wire w27;    //: /sn:0 {0}(298,448)(189,448)(189,128)(156,128){1}
wire w13;    //: /sn:0 /dp:1 {0}(363,161)(551,161){1}
wire w5;    //: /sn:0 {0}(298,158)(156,158){1}
wire w29;    //: /sn:0 {0}(363,413)(505,413)(505,55)(609,55){1}
wire w42;    //: /sn:0 {0}(551,288)(331,288)(331,307){1}
//: enddecls

  full g8 (.CI(w41), .A(w16), .B(w15), .S(w17), .p(w19), .g(w18));   //: @(299, 208) /sz:(63, 59) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Ro0<0 Ro1<0 Ro2<0 ]
  full g4 (.CI(CI), .A(w0), .B(w5), .S(w2), .p(w13), .g(w12));   //: @(299, 111) /sz:(63, 59) /sn:0 /p:[ Ti0>5 Li0>0 Li1>0 Ro0<0 Ro1<0 Ro2<0 ]
  //: output g13 (p) @(658,223) /sn:0 /w:[ 1 ]
  concat g3 (.I0(w5), .I1(w15), .I2(w21), .I3(w27), .Z(B));   //: @(151,143) /sn:0 /R:2 /w:[ 1 1 1 1 1 ] /dr:1
  concat g2 (.I0(w0), .I1(w16), .I2(w22), .I3(w28), .Z(A));   //: @(151,84) /sn:0 /R:2 /w:[ 1 1 1 1 1 ] /dr:1
  //: input g1 (B) @(86,143) /sn:0 /w:[ 0 ]
  CLA_4 g11 (.c1(CI), .p4(w31), .g4(w30), .p3(w25), .g3(w24), .p2(w19), .g2(w18), .p1(w13), .g1(w12), .c4(w43), .c3(w42), .c2(w41), .C(w44), .gp(p), .gg(g));   //: @(552, 137) /sz:(70, 341) /sn:0 /p:[ Ti0>3 Li0>1 Li1>1 Li2>1 Li3>1 Li4>1 Li5>1 Li6>1 Li7>1 Lo0<0 Lo1<0 Lo2<0 Bo0<1 Ro0<0 Ro1<0 ]
  full g10 (.CI(w43), .A(w28), .B(w27), .S(w29), .p(w31), .g(w30));   //: @(299, 401) /sz:(63, 59) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Ro0<0 Ro1<0 Ro2<0 ]
  //: output g6 (S) @(670,70) /sn:0 /w:[ 1 ]
  full g9 (.CI(w42), .A(w22), .B(w21), .S(w23), .p(w25), .g(w24));   //: @(299, 308) /sz:(63, 59) /sn:0 /p:[ Ti0>1 Li0>0 Li1>0 Ro0<0 Ro1<0 Ro2<0 ]
  concat g7 (.I0(w2), .I1(w17), .I2(w23), .I3(w29), .Z(S));   //: @(614,70) /sn:0 /w:[ 1 1 1 1 0 ] /dr:0
  //: joint g14 (CI) @(331, 38) /w:[ 2 -1 1 4 ]
  //: input g5 (CI) @(254,38) /sn:0 /w:[ 0 ]
  //: input g0 (A) @(87,84) /sn:0 /w:[ 0 ]
  //: output g12 (g) @(654,205) /sn:0 /w:[ 1 ]

endmodule

module add_32(CI, B, A, O, Z);
//: interface  /sz:(57, 57) /bd:[ Ti0>CI(30/57) Li0>B[31:0](41/57) Li1>A[31:0](16/57) Ro0<O(43/57) Ro1<Z[31:0](14/57) ]
input [31:0] B;    //: /sn:0 {0}(127,301)(202,301){1}
input [31:0] A;    //: /sn:0 {0}(127,218)(203,218){1}
output [31:0] Z;    //: /sn:0 /dp:1 {0}(543,239)(599,239){1}
input CI;    //: /sn:0 {0}(334,108)(348,108)(348,144){1}
output O;    //: /sn:0 /dp:1 {0}(389,345)(461,345){1}
wire [15:0] w16;    //: /sn:0 /dp:1 {0}(208,296)(297,296)(297,343)(309,343){1}
wire w4;    //: /sn:0 {0}(390,215)(400,215){1}
wire w3;    //: /sn:0 {0}(347,231)(347,274){1}
wire [15:0] w2;    //: /sn:0 {0}(310,213)(283,213)(283,306)(208,306){1}
wire [15:0] w11;    //: /sn:0 {0}(389,300)(473,300)(473,234)(537,234){1}
wire [15:0] w12;    //: /sn:0 /dp:1 {0}(209,223)(300,223)(300,154)(310,154){1}
wire [15:0] w13;    //: /sn:0 /dp:1 {0}(209,213)(247,213)(247,284)(309,284){1}
wire [15:0] w5;    //: /sn:0 {0}(390,170)(456,170)(456,244)(537,244){1}
wire w9;    //: /sn:0 {0}(346,361)(346,371){1}
//: enddecls

  concat g4 (.I0(w12), .I1(w13), .Z(A));   //: @(204,218) /sn:0 /R:2 /w:[ 0 0 1 ] /dr:1
  //: input g8 (CI) @(332,108) /sn:0 /w:[ 0 ]
  //: input g3 (B) @(125,301) /sn:0 /w:[ 0 ]
  //: input g2 (A) @(125,218) /sn:0 /w:[ 0 ]
  add_16 g1 (.CI(w3), .B(w16), .A(w13), .C(w9), .Z(w11), .O(O));   //: @(310, 275) /sz:(78, 85) /sn:0 /p:[ Ti0>1 Li0>1 Li1>1 Bo0<0 Ro0<0 Ro1<0 ]
  concat g6 (.I0(w5), .I1(w11), .Z(Z));   //: @(542,239) /sn:0 /w:[ 1 1 0 ] /dr:0
  //: output g7 (O) @(458,345) /sn:0 /w:[ 1 ]
  //: output g9 (Z) @(596,239) /sn:0 /w:[ 1 ]
  concat g5 (.I0(w2), .I1(w16), .Z(B));   //: @(203,301) /sn:0 /R:2 /w:[ 1 0 1 ] /dr:1
  add_16 g0 (.CI(CI), .B(w2), .A(w12), .C(w3), .Z(w5), .O(w4));   //: @(311, 145) /sz:(78, 85) /sn:0 /p:[ Ti0>1 Li0>0 Li1>1 Bo0<0 Ro0<0 Ro1<0 ]

endmodule

module ALU(Z, Op, over, A, B, neg, zero);
//: interface  /sz:(99, 92) /bd:[ Ti0>Op[3:0](46/99) Li0>B[31:0](61/92) Li1>A[31:0](21/92) Ro0<over(77/92) Ro1<zero(69/92) Ro2<neg(61/92) Ro3<Z[31:0](26/92) ]
input [31:0] B;    //: /sn:0 {0}(288,326)(129,326){1}
//: {2}(127,324)(127,280){3}
//: {4}(129,278)(202,278){5}
//: {6}(127,276)(127,142){7}
//: {8}(129,140)(312,140){9}
//: {10}(125,140)(92,140){11}
//: {12}(127,328)(127,353){13}
//: {14}(129,355)(288,355){15}
//: {16}(127,357)(127,386)(286,386){17}
input [31:0] A;    //: /sn:0 {0}(312,105)(139,105){1}
//: {2}(135,105)(91,105){3}
//: {4}(137,107)(137,251)(229,251){5}
//: {6}(233,251)(271,251){7}
//: {8}(231,253)(231,319){9}
//: {10}(233,321)(288,321){11}
//: {12}(231,323)(231,348){13}
//: {14}(233,350)(288,350){15}
//: {16}(231,352)(231,379){17}
//: {18}(233,381)(286,381){19}
//: {20}(231,383)(231,433)(271,433){21}
supply0 [15:0] w0;    //: /sn:0 {0}(326,464)(326,448)(353,448){1}
output zero;    //: /sn:0 /dp:1 {0}(635,195)(689,195){1}
output [31:0] Z;    //: /sn:0 /dp:1 {0}(610,157)(598,157){1}
//: {2}(596,155)(596,118){3}
//: {4}(598,116)(686,116){5}
//: {6}(594,116)(577,116){7}
//: {8}(596,159)(596,195)(614,195){9}
output over;    //: /sn:0 {0}(362,278)(330,278){1}
output neg;    //: /sn:0 {0}(616,152)(664,152){1}
input [3:0] Op;    //: /sn:0 {0}(137,62)(108,62){1}
wire w6;    //: /sn:0 {0}(143,57)(564,57)(564,93){1}
wire [31:0] w7;    //: /sn:0 /dp:1 {0}(487,276)(435,276)(435,324)(309,324){1}
wire [31:0] w14;    //: /sn:0 {0}(223,276)(271,276){1}
wire [31:0] w15;    //: /sn:0 /dp:1 {0}(487,289)(463,289)(463,384)(307,384){1}
wire w4;    //: /sn:0 {0}(188,213)(178,213){1}
wire [31:0] w3;    //: /sn:0 {0}(487,262)(476,262){1}
//: {2}(474,260)(474,259)(474,259)(474,258){3}
//: {4}(476,256)(487,256){5}
//: {6}(474,254)(474,252)(474,252)(474,251){7}
//: {8}(476,249)(487,249){9}
//: {10}(472,249)(330,249){11}
//: {12}(474,264)(474,265)(474,265)(474,269)(487,269){13}
wire [15:0] w23;    //: /sn:0 {0}(286,428)(277,428){1}
wire [30:0] w1;    //: /sn:0 {0}(626,162)(616,162){1}
wire [31:0] w8;    //: /sn:0 {0}(397,106)(548,106){1}
wire [31:0] w18;    //: /sn:0 {0}(516,273)(540,273)(540,126)(548,126){1}
wire [15:0] w22;    //: /sn:0 {0}(277,438)(353,438){1}
wire [2:0] w10;    //: /sn:0 {0}(172,203)(161,203)(161,175){1}
//: {2}(163,173)(503,173)(503,250){3}
//: {4}(161,171)(161,69){5}
//: {6}(163,67)(354,67)(354,90){7}
//: {8}(159,67)(143,67){9}
wire [31:0] w13;    //: /sn:0 /dp:1 {0}(487,282)(447,282)(447,353)(309,353){1}
wire [31:0] w27;    //: /sn:0 {0}(359,443)(477,443)(477,296)(487,296){1}
wire w5;    //: /sn:0 {0}(178,193)(189,193){1}
wire w9;    //: /sn:0 /dp:1 {0}(178,203)(193,203){1}
//: {2}(197,203)(302,203)(302,234){3}
//: {4}(195,205)(195,273)(202,273){5}
//: enddecls

  mux g4 (.I0(w8), .I1(w18), .S(w6), .Z(Z));   //: @(564,116) /sn:0 /R:1 /w:[ 1 1 1 7 ]
  mux g8 (.I0(w3), .I1(w3), .I2(w3), .I3(w3), .I4(w7), .I5(w13), .I6(w15), .I7(w27), .S(w10), .Z(w18));   //: @(503,273) /sn:0 /R:1 /w:[ 9 5 0 13 0 0 0 1 3 0 ]
  //: output g3 (Z) @(683,116) /sn:0 /w:[ 5 ]
  and g13 (.I0(A), .I1(B), .Z(w7));   //: @(299,324) /sn:0 /w:[ 11 0 1 ]
  //: joint g34 (Z) @(596, 157) /w:[ 1 2 -1 8 ]
  //: joint g37 (B) @(127, 278) /w:[ 4 6 -1 3 ]
  concat g2 (.I0(w10), .I1(w6), .Z(Op));   //: @(138,62) /sn:0 /R:2 /w:[ 9 0 0 ] /dr:1
  //: input g1 (Op) @(106,62) /sn:0 /w:[ 1 ]
  //: joint g11 (w3) @(474, 256) /w:[ 4 6 -1 3 ]
  concat g16 (.I0(w22), .I1(w23), .Z(A));   //: @(272,433) /sn:0 /R:2 /w:[ 0 1 21 ] /dr:1
  //: joint g10 (w3) @(474, 249) /w:[ 8 -1 10 7 ]
  //: output g28 (over) @(359,278) /sn:0 /w:[ 0 ]
  //: joint g19 (A) @(231, 251) /w:[ 6 -1 5 8 ]
  //: supply0 g27 (w0) @(326,470) /sn:0 /w:[ 0 ]
  //: joint g32 (Z) @(596, 116) /w:[ 4 -1 6 3 ]
  //: input g6 (A) @(89,105) /sn:0 /w:[ 3 ]
  //: joint g38 (w9) @(195, 203) /w:[ 2 -1 1 4 ]
  //: input g7 (B) @(90,140) /sn:0 /w:[ 11 ]
  //: joint g9 (w10) @(161, 67) /w:[ 6 -1 8 5 ]
  xor g15 (.I0(A), .I1(B), .Z(w15));   //: @(297,384) /sn:0 /w:[ 19 17 1 ]
  //: joint g20 (A) @(231, 321) /w:[ 10 9 -1 12 ]
  nor g31 (.I0(Z), .Z(zero));   //: @(625,195) /sn:0 /w:[ 9 0 ]
  concat g17 (.I0(w0), .I1(w22), .Z(w27));   //: @(358,443) /sn:0 /w:[ 1 1 0 ] /dr:0
  //: output g29 (neg) @(661,152) /sn:0 /w:[ 1 ]
  xor g25 (.I0(w9), .I1(B), .Z(w14));   //: @(213,276) /sn:0 /w:[ 5 5 0 ]
  shift_32 g5 (.Op(w10), .B(B), .A(A), .Z(w8));   //: @(313, 91) /sz:(83, 70) /sn:0 /p:[ Ti0>7 Li0>9 Li1>0 Ro0<0 ]
  or g14 (.I0(A), .I1(B), .Z(w13));   //: @(299,353) /sn:0 /w:[ 15 15 1 ]
  //: joint g21 (A) @(231, 350) /w:[ 14 13 -1 16 ]
  //: joint g24 (B) @(127, 355) /w:[ 14 13 -1 16 ]
  //: joint g36 (w10) @(161, 173) /w:[ 2 4 -1 1 ]
  //: joint g23 (B) @(127, 326) /w:[ 1 2 -1 12 ]
  add_32 g0 (.CI(w9), .B(w14), .A(A), .O(over), .Z(w3));   //: @(272, 235) /sz:(57, 57) /sn:0 /p:[ Ti0>3 Li0>1 Li1>7 Ro0<1 Ro1<11 ]
  //: joint g22 (A) @(231, 381) /w:[ 18 17 -1 20 ]
  //: joint g26 (B) @(127, 140) /w:[ 8 -1 10 7 ]
  concat g35 (.I0(w4), .I1(w9), .I2(w5), .Z(w10));   //: @(173,203) /sn:0 /R:2 /w:[ 1 0 0 0 ] /dr:1
  //: joint g12 (w3) @(474, 262) /w:[ 1 2 -1 12 ]
  //: joint g18 (A) @(137, 105) /w:[ 1 -1 2 4 ]
  //: output g30 (zero) @(686,195) /sn:0 /w:[ 1 ]
  concat g33 (.I0(w1), .I1(neg), .Z(Z));   //: @(611,157) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1

endmodule

module CLA_4(c3, g1, gg, p1, C, p4, g3, p2, c4, g2, gp, c2, c1, p3, g4);
//: interface  /sz:(70, 341) /bd:[ Ti0>c1(37/70) Li0>g1(11/341) Li1>p1(24/341) Li2>g2(108/341) Li3>p2(121/341) Li4>g3(208/341) Li5>p3(221/341) Li6>g4(301/341) Li7>p4(314/341) Lo0<c2(50/341) Lo1<c3(151/341) Lo2<c4(249/341) Bo0<C(33/70) Ro0<gg(68/341) Ro1<gp(86/341) ]
input g4;    //: /sn:0 /dp:1 {0}(208,338)(198,338)(198,420){1}
//: {2}(196,422)(49,422){3}
//: {4}(198,424)(198,469)(216,469){5}
input g3;    //: /sn:0 /dp:1 {0}(208,245)(199,245)(199,297)(82,297){1}
//: {2}(78,297)(62,297)(62,297)(49,297){3}
//: {4}(80,299)(80,405)(147,405){5}
input g2;    //: /sn:0 /dp:1 {0}(208,146)(190,146)(190,188)(107,188){1}
//: {2}(103,188)(75,188)(75,188)(49,188){3}
//: {4}(105,190)(105,280){5}
//: {6}(107,282)(128,282)(128,282)(147,282){7}
//: {8}(105,284)(105,379)(147,379){9}
input g1;    //: /sn:0 {0}(49,79)(118,79){1}
//: {2}(122,79)(208,79){3}
//: {4}(120,81)(120,166){5}
//: {6}(122,168)(136,168)(136,168)(147,168){7}
//: {8}(120,170)(120,254){9}
//: {10}(122,256)(136,256)(136,256)(147,256){11}
//: {12}(120,258)(120,352)(147,352){13}
output c4;    //: /sn:0 /dp:1 {0}(229,241)(275,241){1}
input c1;    //: /sn:0 {0}(49,12)(133,12)(133,41){1}
//: {2}(135,43)(142,43)(142,43)(147,43){3}
//: {4}(133,45)(133,89)(133,89)(133,133){5}
//: {6}(135,135)(142,135)(142,135)(147,135){7}
//: {8}(133,137)(133,229){9}
//: {10}(135,231)(142,231)(142,231)(147,231){11}
//: {12}(133,233)(133,324)(147,324){13}
input p3;    //: /sn:0 {0}(147,383)(99,383){1}
//: {2}(97,381)(97,360){3}
//: {4}(99,358)(147,358){5}
//: {6}(97,356)(97,333){7}
//: {8}(99,331)(121,331)(121,331)(147,331){9}
//: {10}(97,329)(97,289){11}
//: {12}(99,287)(124,287)(124,287)(147,287){13}
//: {14}(97,285)(97,265){15}
//: {16}(99,263)(124,263)(124,263)(147,263){17}
//: {18}(97,261)(97,242){19}
//: {20}(99,240)(124,240)(124,240)(147,240){21}
//: {22}(95,240)(71,240)(71,240)(49,240){23}
//: {24}(97,385)(97,444)(147,444){25}
input p2;    //: /sn:0 {0}(49,142)(111,142){1}
//: {2}(115,142)(133,142)(133,142)(147,142){3}
//: {4}(113,144)(113,171){5}
//: {6}(115,173)(133,173)(133,173)(147,173){7}
//: {8}(113,175)(113,235){9}
//: {10}(115,237)(131,237)(131,237)(147,237){11}
//: {12}(113,239)(113,258){13}
//: {14}(115,260)(132,260)(132,260)(147,260){15}
//: {16}(113,262)(113,326){17}
//: {18}(115,328)(129,328)(129,328)(147,328){19}
//: {20}(113,330)(113,353){21}
//: {22}(115,355)(147,355){23}
//: {24}(113,357)(113,441)(147,441){25}
output gp;    //: /sn:0 /dp:1 {0}(168,443)(275,443){1}
output c3;    //: /sn:0 /dp:1 {0}(229,143)(275,143){1}
input p1;    //: /sn:0 {0}(49,48)(123,48){1}
//: {2}(127,48)(138,48)(138,48)(147,48){3}
//: {4}(125,50)(125,137){5}
//: {6}(127,139)(138,139)(138,139)(147,139){7}
//: {8}(125,141)(125,232){9}
//: {10}(127,234)(138,234)(138,234)(147,234){11}
//: {12}(125,236)(125,324){13}
//: {14}(127,326)(135,326)(135,326)(147,326){15}
//: {16}(125,328)(125,438)(147,438){17}
output C;    //: /sn:0 /dp:1 {0}(229,334)(275,334){1}
output c2;    //: /sn:0 /dp:1 {0}(229,77)(275,77){1}
input p4;    //: /sn:0 /dp:1 {0}(147,333)(73,333){1}
//: {2}(69,333)(62,333)(62,333)(49,333){3}
//: {4}(71,335)(71,359){5}
//: {6}(73,361)(147,361){7}
//: {8}(71,363)(71,384){9}
//: {10}(73,386)(147,386){11}
//: {12}(71,388)(71,408){13}
//: {14}(73,410)(137,410)(137,410)(147,410){15}
//: {16}(71,412)(71,447)(147,447){17}
output gg;    //: /sn:0 /dp:1 {0}(237,474)(275,474){1}
wire w6;    //: /sn:0 {0}(168,171)(182,171)(182,143)(208,143){1}
wire w16;    //: /sn:0 /dp:1 {0}(216,478)(191,478)(191,410){1}
//: {2}(191,406)(191,336)(208,336){3}
//: {4}(189,408)(168,408){5}
wire w4;    //: /sn:0 {0}(168,236)(208,236){1}
wire w0;    //: /sn:0 /dp:1 {0}(216,475)(182,475)(182,385){1}
//: {2}(182,381)(182,333)(208,333){3}
//: {4}(180,383)(168,383){5}
wire w3;    //: /sn:0 /dp:1 {0}(208,74)(185,74)(185,46)(168,46){1}
wire w1;    //: /sn:0 /dp:1 {0}(216,472)(175,472)(175,359){1}
//: {2}(175,355)(175,331)(208,331){3}
//: {4}(173,357)(168,357){5}
wire w8;    //: /sn:0 {0}(168,260)(178,260)(178,239)(208,239){1}
wire w12;    //: /sn:0 /dp:1 {0}(208,242)(187,242)(187,285)(168,285){1}
wire w2;    //: /sn:0 {0}(168,139)(208,139){1}
wire w5;    //: /sn:0 {0}(168,329)(208,329){1}
//: enddecls

  //: joint g61 (w0) @(182, 383) /w:[ -1 2 4 1 ]
  //: output g8 (c3) @(272,143) /sn:0 /w:[ 1 ]
  or g4 (.I0(w3), .I1(g1), .Z(c2));   //: @(219,77) /sn:0 /w:[ 0 3 0 ]
  or g58 (.I0(g4), .I1(w1), .I2(w0), .I3(w16), .Z(gg));   //: @(227,474) /sn:0 /w:[ 5 0 0 0 0 ]
  //: joint g55 (p2) @(113, 355) /w:[ 22 21 -1 24 ]
  //: joint g51 (p4) @(71, 386) /w:[ 10 9 -1 12 ]
  and g37 (.I0(g3), .I1(p4), .Z(w16));   //: @(158,408) /sn:0 /w:[ 5 15 5 ]
  and g34 (.I0(c1), .I1(p1), .I2(p2), .I3(p3), .I4(p4), .Z(w5));   //: @(158,329) /sn:0 /w:[ 13 15 19 9 0 0 ]
  //: joint g13 (p1) @(125, 48) /w:[ 2 -1 1 4 ]
  and g3 (.I0(c1), .I1(p1), .Z(w3));   //: @(158,46) /sn:0 /w:[ 3 3 1 ]
  //: input g2 (g1) @(47,79) /sn:0 /w:[ 0 ]
  //: output g59 (gg) @(272,474) /sn:0 /w:[ 1 ]
  //: input g1 (p1) @(47,48) /sn:0 /w:[ 0 ]
  //: joint g16 (g1) @(120, 79) /w:[ 2 -1 1 4 ]
  and g11 (.I0(c1), .I1(p1), .I2(p2), .Z(w2));   //: @(158,139) /sn:0 /w:[ 7 7 3 0 ]
  //: joint g50 (g3) @(80, 297) /w:[ 1 -1 2 4 ]
  //: joint g28 (p2) @(113, 237) /w:[ 10 9 -1 12 ]
  //: output g10 (C) @(272,334) /sn:0 /w:[ 1 ]
  //: input g32 (p4) @(47,333) /sn:0 /w:[ 3 ]
  //: joint g27 (g1) @(120, 168) /w:[ 6 5 -1 8 ]
  //: input g19 (g3) @(47,297) /sn:0 /w:[ 3 ]
  or g38 (.I0(w5), .I1(w1), .I2(w0), .I3(w16), .I4(g4), .Z(C));   //: @(219,334) /sn:0 /w:[ 1 3 3 3 0 0 ]
  //: input g6 (p2) @(47,142) /sn:0 /w:[ 0 ]
  //: joint g57 (p4) @(71, 410) /w:[ 14 13 -1 16 ]
  and g53 (.I0(p1), .I1(p2), .I2(p3), .I3(p4), .Z(gp));   //: @(158,443) /sn:0 /w:[ 17 25 25 17 0 ]
  //: output g9 (c4) @(272,241) /sn:0 /w:[ 1 ]
  //: input g7 (g2) @(47,188) /sn:0 /w:[ 3 ]
  //: joint g31 (p3) @(97, 263) /w:[ 16 18 -1 15 ]
  and g20 (.I0(c1), .I1(p1), .I2(p2), .I3(p3), .Z(w4));   //: @(158,236) /sn:0 /w:[ 11 11 11 21 0 ]
  and g15 (.I0(g1), .I1(p2), .Z(w6));   //: @(158,171) /sn:0 /w:[ 7 7 0 ]
  //: joint g39 (c1) @(133, 231) /w:[ 10 9 -1 12 ]
  //: joint g48 (p3) @(97, 358) /w:[ 4 6 -1 3 ]
  //: joint g43 (g1) @(120, 256) /w:[ 10 9 -1 12 ]
  //: joint g62 (w1) @(175, 357) /w:[ -1 2 4 1 ]
  //: joint g29 (p3) @(97, 240) /w:[ 20 -1 22 19 ]
  //: joint g25 (p1) @(125, 139) /w:[ 6 5 -1 8 ]
  //: joint g17 (p2) @(113, 142) /w:[ 2 -1 1 4 ]
  //: joint g63 (g4) @(198, 422) /w:[ -1 1 2 4 ]
  //: output g52 (gp) @(272,443) /sn:0 /w:[ 1 ]
  //: joint g42 (p3) @(97, 287) /w:[ 12 14 -1 11 ]
  //: joint g56 (p3) @(97, 383) /w:[ 1 2 -1 24 ]
  or g14 (.I0(w2), .I1(w6), .I2(g2), .Z(c3));   //: @(219,143) /sn:0 /w:[ 1 1 0 0 ]
  //: output g5 (c2) @(272,77) /sn:0 /w:[ 1 ]
  //: joint g47 (g2) @(105, 282) /w:[ 6 5 -1 8 ]
  //: joint g44 (p2) @(113, 328) /w:[ 18 17 -1 20 ]
  and g36 (.I0(g2), .I1(p3), .I2(p4), .Z(w0));   //: @(158,383) /sn:0 /w:[ 9 0 11 5 ]
  //: joint g24 (c1) @(133, 135) /w:[ 6 5 -1 8 ]
  and g21 (.I0(g1), .I1(p2), .I2(p3), .Z(w8));   //: @(158,260) /sn:0 /w:[ 11 15 17 0 ]
  //: joint g41 (p2) @(113, 260) /w:[ 14 13 -1 16 ]
  or g23 (.I0(w4), .I1(w8), .I2(w12), .I3(g3), .Z(c4));   //: @(219,241) /sn:0 /w:[ 1 1 0 0 0 ]
  //: joint g60 (w16) @(191, 408) /w:[ -1 2 4 1 ]
  //: joint g54 (p1) @(125, 326) /w:[ 14 13 -1 16 ]
  //: joint g40 (p1) @(125, 234) /w:[ 10 9 -1 12 ]
  //: joint g46 (p4) @(71, 333) /w:[ 1 -1 2 4 ]
  //: joint g45 (p3) @(97, 331) /w:[ 8 10 -1 7 ]
  and g35 (.I0(g1), .I1(p2), .I2(p3), .I3(p4), .Z(w1));   //: @(158,357) /sn:0 /w:[ 13 23 5 7 5 ]
  //: joint g26 (p2) @(113, 173) /w:[ 6 5 -1 8 ]
  and g22 (.I0(g2), .I1(p3), .Z(w12));   //: @(158,285) /sn:0 /w:[ 7 13 1 ]
  //: input g0 (c1) @(47,12) /sn:0 /w:[ 0 ]
  //: input g18 (p3) @(47,240) /sn:0 /w:[ 23 ]
  //: joint g12 (c1) @(133, 43) /w:[ 2 1 -1 4 ]
  //: input g33 (g4) @(47,422) /sn:0 /w:[ 3 ]
  //: joint g30 (g2) @(105, 188) /w:[ 1 -1 2 4 ]
  //: joint g49 (p4) @(71, 361) /w:[ 6 5 -1 8 ]

endmodule

module trace(clk, IW, PC, rset, IR);
//: interface  /sz:(58, 48) /bd:[ Li0>PC[31:0](38/48) Li1>rset(11/48) Bi0>clk(29/58) Ri0>IW(13/48) Ri1>IR[31:0](39/48) ]
supply0 w6;    //: /sn:0 {0}(483,306)(483,282){1}
supply0 [7:0] w7;    //: /sn:0 {0}(451,418)(451,405)(399,405){1}
input [31:0] IR;    //: /sn:0 {0}(125,111)(135,111){1}
input [31:0] PC;    //: /sn:0 {0}(514,147)(574,147)(574,255)(507,255){1}
supply1 w0;    //: /sn:0 {0}(404,437)(404,447)(385,447)(385,413){1}
input rset;    //: /sn:0 {0}(344,201)(381,201)(381,217){1}
input IW;    //: /sn:0 {0}(490,232)(490,176)(393,176){1}
//: {2}(389,176)(340,176){3}
//: {4}(391,178)(391,217){5}
input clk;    //: /sn:0 {0}(376,305)(386,305)(386,293){1}
supply1 w5;    //: /sn:0 {0}(518,300)(518,310)(497,310)(497,282){1}
wire [7:0] w4;    //: /sn:0 {0}(370,389)(277,389)(277,255)(375,255){1}
wire [7:0] A;    //: /sn:0 /dp:2 {0}(396,255)(427,255){1}
//: {2}(431,255)(446,255)(446,255)(472,255){3}
//: {4}(429,257)(429,373)(399,373){5}
wire w8;    //: /sn:0 {0}(385,365)(385,355){1}
//: enddecls

  //: joint g4 (IW) @(391, 176) /w:[ 1 -1 2 4 ]
  register g8 (.Q(A), .D(w4), .EN(!IW), .CLR(!rset), .CK(clk));   //: @(386,255) /sn:0 /R:1 /w:[ 0 1 5 1 1 ]
  //: supply0 g13 (w7) @(451,424) /sn:0 /w:[ 0 ]
  //: input g3 (clk) @(374,305) /sn:0 /w:[ 0 ]
  //: input g2 (IW) @(338,176) /sn:0 /w:[ 3 ]
  //: input g1 (PC) @(512,147) /sn:0 /w:[ 0 ]
  //: joint g11 (A) @(429, 255) /w:[ 2 -1 1 4 ]
  add g10 (.A(A), .B(w7), .S(w4), .CI(w0), .CO(w8));   //: @(383,389) /sn:0 /R:3 /w:[ 5 1 0 1 0 ]
  ram m1 (.A(A), .D(PC), .WE(!IW), .OE(w5), .CS(w6));   //: @(490,256) /sn:0 /w:[ 3 1 0 1 1 ]
  //: supply0 g6 (w6) @(483,312) /sn:0 /w:[ 0 ]
  //: input g9 (rset) @(342,201) /sn:0 /w:[ 0 ]
  //: supply1 g7 (w5) @(529,300) /sn:0 /w:[ 0 ]
  //: input g0 (IR) @(123,111) /sn:0 /w:[ 0 ]
  //: supply1 g12 (w0) @(415,437) /sn:0 /w:[ 0 ]

endmodule

module memory(WData, Data, Write, Addr);
//: interface  /sz:(91, 81) /bd:[ Ti0>Write(43/91) Li0>Addr[31:0](27/81) Bi0>WData[31:0](40/91) Ro0<Data[31:0](27/81) ]
output [31:0] Data;    //: /sn:0 /dp:1 {0}(337,213)(337,134){1}
//: {2}(339,132)(392,132){3}
//: {4}(335,132)(296,132){5}
input [31:0] WData;    //: /sn:0 {0}(289,264)(337,264)(337,229){1}
supply0 w1;    //: /sn:0 {0}(272,185)(272,159){1}
input [31:0] Addr;    //: /sn:0 {0}(163,137)(110,137){1}
input Write;    //: /sn:0 {0}(264,221)(284,221){1}
//: {2}(288,221)(305,221){3}
//: {4}(309,221)(332,221){5}
//: {6}(307,219)(307,79)(279,79)(279,109){7}
//: {8}(286,219)(286,159){9}
wire [1:0] w0;    //: /sn:0 {0}(179,142)(169,142){1}
wire [29:0] w2;    //: /sn:0 {0}(261,132)(169,132){1}
//: enddecls

  //: input g8 (WData) @(287,264) /sn:0 /w:[ 0 ]
  //: output g4 (Data) @(389,132) /sn:0 /w:[ 3 ]
  //: input g3 (Write) @(262,221) /sn:0 /w:[ 0 ]
  //: supply0 g2 (w1) @(272,191) /sn:0 /w:[ 0 ]
  concat g1 (.I0(w0), .I1(w2), .Z(Addr));   //: @(164,137) /sn:0 /R:2 /w:[ 1 1 0 ] /dr:1
  //: joint g6 (Data) @(337, 132) /w:[ 2 -1 4 1 ]
  ram m1 (.A(w2), .D(Data), .WE(!Write), .OE(Write), .CS(w1));   //: @(279,133) /w:[ 0 5 7 9 1 ]
  //: joint g9 (Write) @(307, 221) /w:[ 4 6 3 -1 ]
  //: joint g7 (Write) @(286, 221) /w:[ 2 8 1 -1 ]
  bufif1 g5 (.Z(Data), .I(WData), .E(Write));   //: @(337,223) /sn:0 /R:1 /w:[ 0 1 5 ]
  //: input g0 (Addr) @(108,137) /sn:0 /w:[ 1 ]

endmodule

module control(CLK, PCWrite, RegWA, zero, MemWrite, neg, RegW, op, over, PCSource, Cond, RegWD, RSET, func, IRWrite, ALUSrcB, ALUSrcA, ALUOp, MemAddr);
//: interface  /sz:(40, 40) /bd:[ ]
output [1:0] RegWA;    //: /sn:0 {0}(632,341)(506,341){1}
output RegW;    //: /sn:0 {0}(632,361)(506,361){1}
supply0 w3;    //: /sn:0 {0}(330,218)(330,206){1}
supply0 w0;    //: /sn:0 /dp:1 {0}(351,283)(351,271)(368,271)(368,281){1}
output [1:0] RegWD;    //: /sn:0 {0}(632,351)(506,351){1}
input zero;    //: /sn:0 {0}(612,146)(640,146){1}
//: {2}(644,146)(697,146){3}
//: {4}(642,148)(642,218)(771,218)(771,405)(614,405)(614,456)(624,456){5}
supply1 w24;    //: /sn:0 {0}(352,492)(352,502)(336,502)(336,473){1}
supply0 [7:0] w23;    //: /sn:0 {0}(393,484)(393,465)(350,465){1}
output PCWrite;    //: /sn:0 {0}(752,449)(727,449){1}
input over;    //: /sn:0 {0}(608,179)(624,179){1}
//: {2}(628,179)(697,179){3}
//: {4}(626,181)(626,204)(610,204){5}
input neg;    //: /sn:0 {0}(605,158)(697,158){1}
output MemWrite;    //: /sn:0 {0}(632,331)(506,331){1}
input [5:0] func;    //: /sn:0 {0}(49,194)(109,194){1}
output Cond;    //: /sn:0 /dp:1 {0}(762,178)(782,178){1}
output [1:0] PCSource;    //: /sn:0 {0}(632,311)(506,311){1}
supply0 w8;    //: /sn:0 {0}(457,367)(457,348){1}
output [1:0] ALUSrcB;    //: /sn:0 {0}(632,291)(506,291){1}
output MemAddr;    //: /sn:0 /dp:1 {0}(506,321)(632,321){1}
output ALUSrcA;    //: /sn:0 /dp:1 {0}(506,281)(632,281){1}
output IRWrite;    //: /sn:0 {0}(632,371)(506,371){1}
input CLK;    //: /sn:0 {0}(328,374)(346,374)(346,359){1}
output [3:0] ALUOp;    //: /sn:0 /dp:1 {0}(690,67)(742,67){1}
input RSET;    //: /sn:0 {0}(319,271)(341,271)(341,283){1}
input [5:0] op;    //: /sn:0 {0}(48,174)(64,174){1}
//: {2}(68,174)(109,174){3}
//: {4}(66,172)(66,126)(87,126){5}
supply0 [7:0] w26;    //: /sn:0 {0}(157,324)(157,315)(260,315){1}
wire [4:0] w32;    //: /sn:0 {0}(452,36)(427,36){1}
wire [8:0] w6;    //: /sn:0 /dp:1 {0}(506,391)(530,391)(530,409)(465,409){1}
wire w7;    //: /sn:0 {0}(572,461)(603,461){1}
//: {2}(607,461)(624,461){3}
//: {4}(605,459)(605,439)(698,439){5}
wire w16;    //: /sn:0 {0}(484,70)(493,70)(493,35)(503,35){1}
wire w14;    //: /sn:0 {0}(427,26)(436,26)(436,21)(446,21){1}
wire [6:0] w15;    //: /sn:0 {0}(193,179)(213,179){1}
//: {2}(217,179)(312,179){3}
//: {4}(215,177)(215,70)(390,70){5}
//: {6}(394,70)(420,70){7}
//: {8}(392,68)(392,26)(421,26){9}
wire [3:0] w19;    //: /sn:0 {0}(506,271)(566,271)(566,79){1}
//: {2}(568,77)(661,77){3}
//: {4}(566,75)(566,20)(633,20){5}
wire [7:0] w4;    //: /sn:0 {0}(347,179)(363,179)(363,247)(241,247)(241,327)(260,327){1}
wire [7:0] mpc;    //: /sn:0 /dp:2 {0}(356,321)(393,321){1}
//: {2}(397,321)(439,321){3}
//: {4}(395,323)(395,433)(350,433){5}
wire w37;    //: /sn:0 {0}(654,20)(677,20)(677,44){1}
wire [3:0] w34;    //: /sn:0 {0}(478,75)(448,75){1}
//: {2}(444,75)(426,75){3}
//: {4}(446,77)(446,116)(531,116){5}
wire [1:0] w21;    //: /sn:0 /dp:1 {0}(276,298)(276,259)(412,259)(412,228)(523,228)(523,251)(506,251){1}
wire w28;    //: /sn:0 {0}(746,201)(746,381)(506,381){1}
wire w20;    //: /sn:0 {0}(506,261)(626,261)(626,209)(610,209){1}
wire w1;    //: /sn:0 {0}(449,414)(459,414){1}
wire [7:0] w25;    //: /sn:0 {0}(321,449)(198,449)(198,303)(260,303){1}
wire w18;    //: /sn:0 /dp:1 {0}(496,190)(496,207)(589,207){1}
wire w40;    //: /sn:0 {0}(108,126)(123,126){1}
//: {2}(127,126)(172,126)(172,174)(187,174){3}
//: {4}(125,128)(125,161){5}
wire [5:0] w35;    //: /sn:0 {0}(138,184)(187,184){1}
wire [2:0] w30;    //: /sn:0 {0}(737,140)(737,121)(537,121){1}
wire w17;    //: /sn:0 /dp:1 {0}(446,16)(427,16){1}
wire [7:0] nextmpc;    //: /sn:0 {0}(289,321)(335,321){1}
wire [2:0] w22;    //: /sn:0 {0}(436,65)(426,65){1}
wire w2;    //: /sn:0 /dp:1 {0}(503,30)(477,30)(477,19)(467,19){1}
wire [3:0] w11;    //: /sn:0 {0}(552,57)(661,57){1}
wire w12;    //: /sn:0 {0}(645,459)(698,459){1}
wire [31:0] mcode;    //: /sn:0 {0}(474,321)(500,321){1}
wire [7:0] w10;    //: /sn:0 {0}(459,404)(241,404)(241,339)(260,339){1}
wire [2:0] w13;    //: /sn:0 {0}(484,80)(536,80)(536,62)(546,62){1}
wire w27;    //: /sn:0 {0}(336,425)(336,415){1}
wire [1:0] w5;    //: /sn:0 /dp:1 {0}(506,301)(551,301)(551,456)(566,456){1}
wire w33;    //: /sn:0 {0}(547,111)(537,111){1}
wire w9;    //: /sn:0 {0}(572,451)(594,451)(594,414)(714,414)(714,426){1}
wire w39;    //: /sn:0 {0}(524,33)(532,33)(532,52)(546,52){1}
//: enddecls

  //: joint g61 (w15) @(392, 70) /w:[ 6 8 5 -1 ]
  //: supply0 g8 (w23) @(393,490) /sn:0 /w:[ 0 ]
  //: input g4 (CLK) @(326,374) /sn:0 /w:[ 0 ]
  led g13 (.I(w18));   //: @(496,183) /sn:0 /w:[ 0 ] /type:0
  //: joint g58 (w7) @(605, 461) /w:[ 2 4 1 -1 ]
  //: output g55 (PCWrite) @(749,449) /sn:0 /w:[ 0 ]
  //: output g51 (RegWA) @(629,341) /sn:0 /w:[ 0 ]
  //: input g37 (zero) @(610,146) /sn:0 /w:[ 0 ]
  //: joint g34 (w19) @(566, 77) /w:[ 2 4 -1 1 ]
  //: supply0 g3 (w0) @(368,287) /sn:0 /w:[ 1 ]
  or g65 (.I0(w2), .I1(w16), .Z(w39));   //: @(514,33) /sn:0 /w:[ 0 1 0 ]
  concat g2 (.I0(w13), .I1(w39), .Z(w11));   //: @(551,57) /sn:0 /w:[ 1 1 0 ] /dr:0
  //: joint g59 (zero) @(642, 146) /w:[ 2 -1 1 4 ]
  //: supply0 g1 (w8) @(457,373) /sn:0 /w:[ 0 ]
  //: joint g64 (w34) @(446, 75) /w:[ 1 -1 2 4 ]
  //: supply0 g11 (w26) @(157,330) /sn:0 /w:[ 0 ]
  rom map (.A(w15), .D(w4), .OE(w3));   //: @(330,180) /w:[ 3 0 1 ]
  register mpc (.Q(mpc), .D(nextmpc), .EN(w0), .CLR(!RSET), .CK(CLK));   //: @(346,321) /R:1 /w:[ 0 1 0 1 1 ]
  //: output g50 (MemWrite) @(629,331) /sn:0 /w:[ 0 ]
  concat g28 (.I0(w34), .I1(w22), .Z(w15));   //: @(421,70) /sn:0 /R:2 /w:[ 3 1 7 ] /dr:1
  mux g10 (.I0(w25), .I1(w26), .I2(w4), .I3(w10), .S(w21), .Z(nextmpc));   //: @(276,321) /sn:0 /R:1 /w:[ 1 1 1 1 0 0 ]
  concat g32 (.I0(w32), .I1(w14), .I2(w17), .Z(w15));   //: @(422,26) /sn:0 /R:2 /w:[ 1 0 1 9 ] /dr:1
  //: comment g27 /dolink:0 /link:"" @(92,92) /sn:0
  //: /line:"map index"
  //: /end
  //: supply0 g19 (w3) @(330,224) /sn:0 /w:[ 0 ]
  //: input g38 (neg) @(603,158) /sn:0 /w:[ 0 ]
  add g6 (.A(mpc), .B(w23), .S(w25), .CI(w24), .CO(w27));   //: @(334,449) /sn:0 /R:3 /w:[ 5 1 0 1 0 ]
  xor g57 (.I0(zero), .I1(w7), .Z(w12));   //: @(635,459) /sn:0 /w:[ 5 3 0 ]
  //: output g53 (RegW) @(629,361) /sn:0 /w:[ 0 ]
  //: supply1 g9 (w24) @(363,492) /sn:0 /w:[ 0 ]
  //: joint g7 (mpc) @(395, 321) /w:[ 2 -1 1 4 ]
  mux g31 (.I0(w11), .I1(w19), .S(w37), .Z(ALUOp));   //: @(677,67) /sn:0 /R:1 /w:[ 1 3 1 0 ]
  //: input g20 (op) @(46,174) /sn:0 /w:[ 0 ]
  //: input g39 (over) @(606,179) /sn:0 /w:[ 0 ]
  //: output g48 (PCSource) @(629,311) /sn:0 /w:[ 0 ]
  //: output g43 (Cond) @(779,178) /sn:0 /w:[ 1 ]
  and g62 (.I0(w17), .I1(w14), .Z(w2));   //: @(457,19) /sn:0 /w:[ 0 1 1 ]
  //: joint g25 (op) @(66, 174) /w:[ 2 4 1 -1 ]
  concat g63 (.I0(w13), .I1(w16), .Z(w34));   //: @(479,75) /sn:0 /R:2 /w:[ 0 0 0 ] /dr:1
  //: output g52 (RegWD) @(629,351) /sn:0 /w:[ 0 ]
  mux g56 (.I0(w7), .I1(w12), .S(w9), .Z(PCWrite));   //: @(714,449) /sn:0 /R:1 /w:[ 5 1 1 1 ]
  //: input g5 (RSET) @(317,271) /sn:0 /w:[ 0 ]
  concat g47 (.I0(w7), .I1(w9), .Z(w5));   //: @(567,456) /sn:0 /R:2 /w:[ 0 0 1 ] /dr:1
  //: comment g44 /dolink:0 /link:"" @(442,157) /sn:0
  //: /line:"overflow trap"
  //: /end
  cond g36 (.CC(w30), .over(over), .neg(neg), .zero(zero), .sign(w28), .Cond(Cond));   //: @(698, 141) /sz:(63, 59) /sn:0 /p:[ Ti0>0 Li0>3 Li1>1 Li2>3 Bi0>0 Ro0<0 ]
  nor g24 (.I0(op), .Z(w40));   //: @(98,126) /sn:0 /w:[ 5 0 ]
  //: input g21 (func) @(47,194) /sn:0 /w:[ 0 ]
  //: joint g41 (over) @(626, 179) /w:[ 2 -1 1 4 ]
  mux g23 (.I0(op), .I1(func), .S(w40), .Z(w35));   //: @(125,184) /sn:0 /R:1 /w:[ 3 1 5 0 ]
  rom mcode (.A(mpc), .D(mcode), .OE(w8));   //: @(457,322) /w:[ 3 0 1 ]
  //: comment g60 /dolink:0 /link:"" @(605,486) /sn:0
  //: /line:"conditional PCWrite"
  //: /end
  //: output g54 (IRWrite) @(629,371) /sn:0 /w:[ 0 ]
  and g40 (.I0(over), .I1(w20), .Z(w18));   //: @(599,207) /sn:0 /R:2 /w:[ 5 1 1 ]
  //: output g46 (ALUSrcB) @(629,291) /sn:0 /w:[ 0 ]
  //: output g45 (ALUSrcA) @(629,281) /sn:0 /w:[ 1 ]
  //: output g35 (ALUOp) @(739,67) /sn:0 /w:[ 1 ]
  //: joint g26 (w40) @(125, 126) /w:[ 2 -1 1 4 ]
  concat g22 (.I0(w35), .I1(w40), .Z(w15));   //: @(192,179) /sn:0 /w:[ 1 3 0 ] /dr:0
  concat g0 (.I0(w6), .I1(w28), .I2(IRWrite), .I3(RegW), .I4(RegWD), .I5(RegWA), .I6(MemWrite), .I7(MemAddr), .I8(PCSource), .I9(w5), .I10(ALUSrcB), .I11(ALUSrcA), .I12(w19), .I13(w20), .I14(w21), .Z(mcode));   //: @(501,321) /sn:0 /R:2 /w:[ 0 1 1 1 1 1 1 0 1 0 1 0 0 0 1 1 ] /dr:1
  concat g66 (.I0(w1), .I1(w10), .Z(w6));   //: @(464,409) /sn:0 /w:[ 1 0 1 ] /dr:0
  //: joint g12 (w15) @(215, 179) /w:[ 2 4 1 -1 ]
  or g33 (.I0(w19), .Z(w37));   //: @(644,20) /sn:0 /w:[ 5 0 ]
  concat g30 (.I0(w30), .I1(w33), .Z(w34));   //: @(532,116) /sn:0 /R:2 /w:[ 1 1 5 ] /dr:1
  //: output g49 (MemAddr) @(629,321) /sn:0 /w:[ 1 ]

endmodule

module reg4(CLK, SB, WEN, SA, DA, ENA, CLR, WD, DB, WA, ENB);
//: interface  /sz:(102, 109) /bd:[ Ti0>WD[31:0](49/102) Li0>CLK(101/109) Li1>CLR(91/109) Li2>WEN(72/109) Li3>WA[1:0](61/109) Li4>ENB(46/109) Li5>ENA(35/109) Li6>SB[1:0](21/109) Li7>SA[1:0](9/109) Bo0<DB[31:0](78/102) Bo1<DA[31:0](30/102) ]
input ENB;    //: /sn:0 {0}(573,526)(537,526)(537,563){1}
input [1:0] WA;    //: /sn:0 {0}(36,377)(78,377){1}
input [31:0] WD;    //: /sn:0 {0}(84,109)(215,109){1}
//: {2}(219,109)(379,109){3}
//: {4}(383,109)(532,109){5}
//: {6}(536,109)(673,109)(673,212){7}
//: {8}(534,111)(534,212){9}
//: {10}(381,111)(381,212){11}
//: {12}(217,111)(217,212){13}
input [1:0] SB;    //: /sn:0 {0}(444,502)(483,502){1}
input CLR;    //: /sn:0 {0}(43,304)(271,304){1}
//: {2}(275,304)(437,304){3}
//: {4}(441,304)(589,304){5}
//: {6}(593,304)(731,304)(731,217)(712,217){7}
//: {8}(591,302)(591,217)(573,217){9}
//: {10}(439,302)(439,217)(420,217){11}
//: {12}(273,302)(273,217)(256,217){13}
input [1:0] SA;    //: /sn:0 {0}(194,502)(255,502){1}
input WEN;    //: /sn:0 {0}(34,340)(91,340)(91,353){1}
output [31:0] DB;    //: /sn:0 {0}(585,568)(545,568){1}
input CLK;    //: /sn:0 {0}(43,283)(167,283){1}
//: {2}(171,283)(328,283){3}
//: {4}(332,283)(485,283){5}
//: {6}(489,283)(627,283)(627,222)(636,222){7}
//: {8}(487,281)(487,222)(497,222){9}
//: {10}(330,281)(330,222)(344,222){11}
//: {12}(169,281)(169,222)(180,222){13}
output [31:0] DA;    //: /sn:0 /dp:1 {0}(309,572)(344,572){1}
input ENA;    //: /sn:0 {0}(332,528)(301,528)(301,567){1}
wire w14;    //: /sn:0 {0}(107,395)(722,395)(722,227)(712,227){1}
wire [31:0] w15;    //: /sn:0 {0}(673,233)(673,457)(526,457){1}
//: {2}(522,457)(296,457)(296,486){3}
//: {4}(524,459)(524,471)(524,471)(524,486){5}
wire [31:0] w0;    //: /sn:0 {0}(217,233)(217,431)(258,431){1}
//: {2}(262,431)(488,431)(488,486){3}
//: {4}(260,433)(260,460)(260,460)(260,486){5}
wire [31:0] w23;    //: /sn:0 {0}(278,515)(278,572)(293,572){1}
wire w8;    //: /sn:0 {0}(107,359)(265,359)(265,227)(256,227){1}
wire [31:0] w10;    //: /sn:0 {0}(534,233)(534,447)(514,447){1}
//: {2}(510,447)(284,447)(284,486){3}
//: {4}(512,449)(512,466)(512,466)(512,486){5}
wire [31:0] w27;    //: /sn:0 {0}(506,515)(506,568)(529,568){1}
wire w13;    //: /sn:0 {0}(107,383)(585,383)(585,227)(573,227){1}
wire [31:0] w5;    //: /sn:0 {0}(381,233)(381,436){1}
//: {2}(383,438)(500,438)(500,486){3}
//: {4}(379,438)(272,438)(272,486){5}
wire w9;    //: /sn:0 {0}(107,371)(430,371)(430,227)(420,227){1}
//: enddecls

  mux g4 (.I0(w0), .I1(w5), .I2(w10), .I3(w15), .S(SA), .Z(w23));   //: @(278,502) /sn:0 /w:[ 5 5 3 3 1 0 ]
  //: joint g8 (w10) @(512, 447) /w:[ 1 -1 2 4 ]
  register g3 (.Q(w15), .D(WD), .EN(!w14), .CLR(!CLR), .CK(CLK));   //: @(673,222) /sn:0 /w:[ 0 7 1 7 7 ]
  //: joint g13 (CLK) @(487, 283) /w:[ 6 8 5 -1 ]
  register g2 (.Q(w10), .D(WD), .EN(!w13), .CLR(!CLR), .CK(CLK));   //: @(534,222) /sn:0 /w:[ 0 9 1 9 9 ]
  register g1 (.Q(w5), .D(WD), .EN(!w9), .CLR(!CLR), .CK(CLK));   //: @(381,222) /sn:0 /w:[ 0 11 1 11 11 ]
  //: joint g11 (CLK) @(169, 283) /w:[ 2 12 1 -1 ]
  //: joint g16 (CLR) @(439, 304) /w:[ 4 10 3 -1 ]
  //: input g10 (CLK) @(41,283) /sn:0 /w:[ 0 ]
  bufif1 g28 (.Z(DA), .I(w23), .E(ENA));   //: @(299,572) /sn:0 /w:[ 0 1 1 ]
  demux g19 (.I(WA), .E(WEN), .Z0(w8), .Z1(w9), .Z2(w13), .Z3(w14));   //: @(91,377) /sn:0 /R:1 /w:[ 1 1 0 0 0 0 ]
  bufif1 g27 (.Z(DB), .I(w27), .E(ENB));   //: @(535,568) /sn:0 /w:[ 1 1 1 ]
  //: input g32 (SB) @(442,502) /sn:0 /w:[ 0 ]
  //: joint g6 (w0) @(260, 431) /w:[ 2 -1 1 4 ]
  //: joint g7 (w5) @(381, 438) /w:[ 2 1 4 -1 ]
  //: joint g9 (w15) @(524, 457) /w:[ 1 -1 2 4 ]
  //: joint g15 (CLR) @(273, 304) /w:[ 2 12 1 -1 ]
  //: input g20 (WEN) @(32,340) /sn:0 /w:[ 0 ]
  //: input g31 (SA) @(192,502) /sn:0 /w:[ 0 ]
  //: joint g17 (CLR) @(591, 304) /w:[ 6 8 5 -1 ]
  //: output g25 (DA) @(341,572) /sn:0 /w:[ 1 ]
  //: input g29 (ENA) @(334,528) /sn:0 /R:2 /w:[ 0 ]
  mux g5 (.I0(w0), .I1(w5), .I2(w10), .I3(w15), .S(SB), .Z(w27));   //: @(506,502) /sn:0 /w:[ 3 3 5 5 1 0 ]
  //: input g14 (CLR) @(41,304) /sn:0 /w:[ 0 ]
  //: input g21 (WD) @(82,109) /sn:0 /w:[ 0 ]
  //: joint g24 (WD) @(534, 109) /w:[ 6 -1 5 8 ]
  //: joint g23 (WD) @(381, 109) /w:[ 4 -1 3 10 ]
  register g0 (.Q(w0), .D(WD), .EN(!w8), .CLR(!CLR), .CK(CLK));   //: @(217,222) /sn:0 /w:[ 0 13 1 13 13 ]
  //: joint g22 (WD) @(217, 109) /w:[ 2 -1 1 12 ]
  //: output g26 (DB) @(582,568) /sn:0 /w:[ 0 ]
  //: joint g12 (CLK) @(330, 283) /w:[ 4 10 3 -1 ]
  //: input g18 (WA) @(34,377) /sn:0 /w:[ 0 ]
  //: input g30 (ENB) @(575,526) /sn:0 /R:2 /w:[ 0 ]

endmodule

module main;    //: root_module
supply1 [15:0] w6;    //: /sn:0 /dp:1 {0}(391,487)(378,487)(378,459){1}
supply1 [4:0] w7;    //: /sn:0 {0}(355,253)(355,264)(398,264){1}
supply1 w3;    //: /sn:0 {0}(227,55)(227,61)(214,61){1}
supply1 w37;    //: /sn:0 {0}(837,167)(837,187){1}
supply0 w21;    //: /sn:0 {0}(273,296)(273,285)(258,285)(258,295){1}
supply0 [1:0] w41;    //: /sn:0 {0}(732,123)(732,110)(772,110){1}
supply0 [1:0] w1;    //: /sn:0 {0}(564,505)(564,487)(585,487){1}
supply0 [30:0] w17;    //: /sn:0 {0}(331,363)(331,352)(367,352){1}
supply0 w11;    //: /sn:0 {0}(870,185)(870,177)(847,177)(847,187){1}
wire [25:0] w32;    //: /sn:0 {0}(680,92)(741,92)(741,100)(772,100){1}
wire [31:0] curPC;    //: /sn:0 /dp:1 {0}(175,77)(175,93){1}
wire [31:0] Data;    //: /sn:0 /dp:2 {0}(249,223)(242,223){1}
//: {2}(238,223)(228,223){3}
//: {4}(240,225)(240,333)(242,333){5}
wire [31:0] B;    //: /sn:0 /dp:1 {0}(654,289)(668,289)(668,260)(686,260){1}
wire [4:0] WA;    //: /sn:0 /dp:1 {0}(427,249)(474,249){1}
wire [31:0] IR;    //: /sn:0 /dp:5 {0}(316,223)(289,223){1}
//: {2}(287,221)(287,15)(650,15)(650,87)(674,87){3}
//: {4}(285,223)(270,223){5}
//: {6}(287,225)(287,515)(293,515){7}
wire [31:0] w61;    //: /sn:0 {0}(504,495)(490,495)(490,515)(480,515){1}
//: {2}(478,513)(478,351)(601,351)(601,295)(625,295){3}
//: {4}(476,515)(458,515){5}
wire w60;    //: /sn:0 {0}(354,492)(391,492){1}
wire [31:0] nextPC;    //: /sn:0 /dp:1 {0}(950,94)(957,94)(957,5)(13,5)(13,213)(30,213){1}
wire w14;    //: /sn:0 {0}(462,66)(812,66)(812,276)(787,276){1}
wire [31:0] w4;    //: /sn:0 {0}(176,278)(176,453)(592,453)(592,273){1}
//: {2}(594,271)(625,271){3}
//: {4}(590,271)(575,271){5}
wire [4:0] w15;    //: /sn:0 /dp:1 {0}(398,249)(373,249)(373,228)(322,228){1}
wire w19;    //: /sn:0 /dp:1 {0}(265,185)(265,73){1}
//: {2}(267,71)(352,71){3}
//: {4}(263,71)(214,71){5}
wire [31:0] PC;    //: /sn:0 /dp:7 {0}(674,125)(580,125)(580,166){1}
//: {2}(578,168)(74,168){3}
//: {4}(72,166)(72,52)(175,52)(175,56){5}
//: {6}(72,170)(72,211){7}
//: {8}(74,213)(91,213){9}
//: {10}(70,213)(51,213){11}
//: {12}(72,215)(72,404)(384,404)(384,369)(387,369){13}
//: {14}(580,170)(580,210)(603,210){15}
wire [5:0] w38;    //: /sn:0 {0}(690,82)(680,82){1}
wire [15:0] w51;    //: /sn:0 {0}(309,510)(299,510){1}
wire [31:0] A;    //: /sn:0 /dp:1 {0}(632,220)(686,220){1}
wire [1:0] w0;    //: /sn:0 {0}(352,94)(310,94)(310,313)(403,313)(403,328){1}
wire [31:0] Z;    //: /sn:0 /dp:5 {0}(831,225)(825,225){1}
//: {2}(823,223)(823,76)(921,76){3}
//: {4}(821,225)(787,225){5}
wire [1:0] w63;    //: /sn:0 {0}(462,101)(641,101)(641,266){1}
wire w34;    //: /sn:0 {0}(352,43)(107,43)(107,200){1}
wire [31:0] WD;    //: /sn:0 /dp:1 {0}(416,351)(438,351)(438,262)(474,262){1}
wire [15:0] w67;    //: /sn:0 {0}(412,490)(442,490)(442,510)(452,510){1}
wire [4:0] w54;    //: /sn:0 {0}(322,208)(474,208){1}
wire [4:0] w23;    //: /sn:0 {0}(332,238)(322,238){1}
wire MemWrite;    //: /sn:0 /dp:1 {0}(352,59)(259,59)(259,164)(179,164)(179,195){1}
wire [31:0] w25;    //: /sn:0 {0}(263,333)(387,333){1}
wire [31:0] Addr;    //: /sn:0 /dp:1 {0}(120,223)(135,223){1}
wire [15:0] w65;    //: /sn:0 {0}(348,497)(334,497)(334,518){1}
//: {2}(336,520)(452,520){3}
//: {4}(332,520)(299,520){5}
wire [1:0] w8;    //: /sn:0 {0}(414,146)(414,226){1}
wire WEN;    //: /sn:0 {0}(474,239)(446,239)(446,146){1}
wire [31:0] w71;    //: /sn:0 {0}(778,100)(921,100){1}
wire [1:0] w30;    //: /sn:0 {0}(462,33)(937,33)(937,71){1}
wire [3:0] Op;    //: /sn:0 /dp:1 {0}(462,114)(651,114)(651,181)(733,181)(733,198){1}
wire [5:0] w22;    //: /sn:0 {0}(322,248)(341,248)(341,159)(383,159)(383,146){1}
wire [14:0] w59;    //: /sn:0 {0}(364,502)(354,502){1}
wire [4:0] w53;    //: /sn:0 {0}(322,218)(378,218){1}
//: {2}(382,218)(474,218){3}
//: {4}(380,220)(380,234)(398,234){5}
wire [3:0] w62;    //: /sn:0 /dp:1 {0}(680,120)(749,120)(749,90)(772,90){1}
wire clk;    //: /sn:0 /dp:4 {0}(-68,125)(20,125){1}
//: {2}(24,125)(122,125){3}
//: {4}(126,125)(352,125){5}
//: {6}(124,123)(124,66)(138,66){7}
//: {8}(22,127)(22,263)(39,263){9}
//: {10}(41,261)(41,251){11}
//: {12}(41,265)(41,391)(251,391){13}
//: {14}(255,391)(263,391){15}
//: {16}(267,391)(456,391){17}
//: {18}(460,391)(842,391)(842,263){19}
//: {20}(458,389)(458,298)(474,298){21}
//: {22}(265,389)(265,267)(260,267)(260,261){23}
//: {24}(253,389)(253,371){25}
wire w57;    //: /sn:0 {0}(462,91)(619,91)(619,197){1}
wire w12;    //: /sn:0 {0}(462,48)(799,48)(799,260)(787,260){1}
wire w2;    //: /sn:0 {0}(474,288)(280,288)(280,279)(250,279){1}
//: {2}(248,277)(248,177){3}
//: {4}(250,175)(255,175)(255,185){5}
//: {6}(248,173)(248,116){7}
//: {8}(250,114)(352,114){9}
//: {10}(246,114)(38,114){11}
//: {12}(36,112)(36,81)(-62,81){13}
//: {14}(36,116)(36,175){15}
//: {16}(248,281)(248,295){17}
wire [31:0] w70;    //: /sn:0 {0}(591,482)(613,482)(613,307)(625,307){1}
wire [29:0] w10;    //: /sn:0 {0}(585,477)(552,477)(552,500)(510,500){1}
wire w27;    //: /sn:0 {0}(352,33)(46,33)(46,175){1}
wire w13;    //: /sn:0 {0}(462,57)(805,57)(805,268)(787,268){1}
wire [31:0] w5;    //: /sn:0 {0}(555,336)(582,336)(582,283)(625,283){1}
wire [31:0] w52;    //: /sn:0 {0}(603,230)(595,230){1}
//: {2}(593,228)(593,154)(914,154)(914,112)(921,112){3}
//: {4}(591,230)(575,230){5}
wire [31:0] w48;    //: /sn:0 {0}(387,345)(377,345)(377,439){1}
//: {2}(379,441)(899,441)(899,227){3}
//: {4}(899,223)(899,88)(921,88){5}
//: {6}(897,225)(852,225){7}
//: {8}(375,441)(82,441)(82,233)(91,233){9}
wire [31:0] w47;    //: /sn:0 {0}(373,357)(387,357){1}
wire [27:0] w42;    //: /sn:0 {0}(690,130)(680,130){1}
wire [1:0] w50;    //: /sn:0 {0}(510,490)(526,490){1}
wire [5:0] w55;    //: /sn:0 {0}(322,198)(332,198)(332,151)(361,151)(361,146){1}
wire w26;    //: /sn:0 {0}(352,84)(300,84)(300,362)(367,362){1}
//: enddecls

  //: joint g8 (PC) @(72, 213) /w:[ 8 7 10 12 ]
  mux g4 (.I0(PC), .I1(w48), .S(w34), .Z(Addr));   //: @(107,223) /sn:0 /R:1 /w:[ 9 9 1 0 ]
  register curPC (.Q(curPC), .D(PC), .EN(!w19), .CLR(w3), .CK(clk));   //: @(175,66) /w:[ 0 5 5 1 7 ]
  //: joint g51 (w2) @(248, 279) /w:[ 1 2 -1 16 ]
  concat g37 (.I0(w32), .I1(w38), .Z(IR));   //: @(675,87) /sn:0 /R:2 /w:[ 0 1 3 ] /dr:1
  //: joint g34 (Z) @(823, 225) /w:[ 1 2 4 -1 ]
  //: joint g13 (IR) @(287, 223) /w:[ 1 2 4 6 ]
  concat g3 (.I0(w22), .I1(w23), .I2(w15), .I3(w53), .I4(w54), .I5(w55), .Z(IR));   //: @(317,223) /sn:0 /R:2 /w:[ 0 1 1 0 0 0 0 ] /dr:1
  //: supply1 g55 (w3) @(238,55) /sn:0 /w:[ 0 ]
  register IR (.Q(IR), .D(Data), .EN(!w19), .CLR(!w2), .CK(clk));   //: @(260,223) /R:1 /w:[ 5 0 0 5 23 ]
  //: supply0 g2 (w1) @(564,511) /sn:0 /w:[ 0 ]
  register PC (.Q(PC), .D(nextPC), .EN(!w27), .CLR(!w2), .CK(clk));   //: @(41,213) /R:1 /w:[ 11 1 1 15 11 ]
  reg32 g1 (.WD(WD), .SA(w54), .SB(w53), .WA(WA), .WEN(WEN), .CLR(w2), .CLK(clk), .DB(w4), .DA(w52));   //: @(475, 199) /sz:(99, 111) /sn:0 /p:[ Li0>1 Li1>1 Li2>3 Li3>1 Li4>0 Li5>0 Li6>21 Ro0<5 Ro1<5 ]
  //: supply1 g16 (w7) @(366,253) /sn:0 /w:[ 0 ]
  //: supply0 g11 (w17) @(331,369) /sn:0 /w:[ 0 ]
  //: joint g50 (clk) @(41, 263) /w:[ -1 10 9 12 ]
  concat g28 (.I0(w1), .I1(w10), .Z(w70));   //: @(590,482) /sn:0 /w:[ 1 0 0 ] /dr:0
  concat g10 (.I0(w26), .I1(w17), .Z(w47));   //: @(372,357) /sn:0 /w:[ 1 1 0 ] /dr:0
  //: supply0 g32 (w11) @(870,191) /sn:0 /w:[ 0 ]
  //: joint g19 (w4) @(592, 271) /w:[ 2 -1 4 1 ]
  concat g38 (.I0(w42), .I1(w62), .Z(PC));   //: @(675,125) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1
  mux g6 (.I0(w25), .I1(w48), .I2(w47), .I3(PC), .S(w0), .Z(WD));   //: @(403,351) /sn:0 /R:1 /w:[ 1 0 1 13 1 0 ]
  //: joint g9 (w48) @(377, 441) /w:[ 2 1 8 -1 ]
  //: joint g7 (Data) @(240, 223) /w:[ 1 -1 2 4 ]
  //: joint g53 (PC) @(72, 168) /w:[ 3 4 -1 6 ]
  //: comment g31 /dolink:0 /link:"" @(531,529) /sn:0
  //: /line:"shl 2"
  //: /end
  //: dip g20 (w5) @(517,336) /sn:0 /R:1 /w:[ 0 ] /st:4
  //: joint g15 (w53) @(380, 218) /w:[ 2 -1 1 4 ]
  memory memory (.Write(MemWrite), .Addr(Addr), .WData(w4), .Data(Data));   //: @(136, 196) /sz:(91, 81) /sn:0 /p:[ Ti0>1 Li0>1 Bi0>0 Ro0<3 ]
  concat g39 (.I0(w41), .I1(w32), .I2(w62), .Z(w71));   //: @(777,100) /sn:0 /w:[ 1 1 1 0 ] /dr:0
  //: joint g48 (w2) @(248, 114) /w:[ 8 -1 10 7 ]
  //: supply0 g43 (w21) @(273,302) /sn:0 /w:[ 0 ]
  control control (.RSET(w2), .CLK(clk), .func(w22), .op(w55), .over(w14), .zero(w13), .neg(w12), .MemWrite(MemWrite), .Cond(w26), .RegWD(w0), .IRWrite(w19), .MemAddr(w34), .PCWrite(w27), .RegW(WEN), .RegWA(w8), .ALUOp(Op), .ALUSrcB(w63), .ALUSrcA(w57), .PCSource(w30));   //: @(353, 22) /sz:(108, 123) /sn:0 /p:[ Li0>9 Li1>5 Bi0>1 Bi1>1 Ri0>0 Ri1>0 Ri2>0 Lo0<0 Lo1<0 Lo2<0 Lo3<3 Lo4<0 Lo5<0 Bo0<1 Bo1<0 Ro0<0 Ro1<0 Ro2<0 Ro3<0 ]
  //: joint g29 (w61) @(478, 515) /w:[ 1 2 4 -1 ]
  and g25 (.I0(w6), .I1(w60), .Z(w67));   //: @(402,490) /sn:0 /w:[ 0 1 0 ]
  mux g17 (.I0(PC), .I1(w52), .S(w57), .Z(A));   //: @(619,220) /sn:0 /R:1 /w:[ 15 0 1 0 ]
  //: joint g42 (clk) @(265, 391) /w:[ 16 22 15 -1 ]
  //: joint g52 (clk) @(124, 125) /w:[ 4 6 3 -1 ]
  mux g14 (.I0(w53), .I1(w15), .I2(w7), .S(w8), .Z(WA));   //: @(414,249) /sn:0 /R:1 /w:[ 5 0 1 1 0 ]
  mux g5 (.I0(Z), .I1(w48), .I2(w71), .I3(w52), .S(w30), .Z(nextPC));   //: @(937,94) /sn:0 /R:1 /w:[ 3 5 1 3 1 0 ]
  //: joint g47 (w2) @(248, 175) /w:[ 4 6 -1 3 ]
  //: joint g44 (clk) @(253, 391) /w:[ 14 24 13 -1 ]
  register ALUOut (.Q(w48), .D(Z), .EN(w11), .CLR(w37), .CK(clk));   //: @(842,225) /R:1 /w:[ 7 0 1 1 19 ]
  clock clk (.Z(clk));   //: @(-81,125) /w:[ 0 ] /omega:400 /phi:0 /duty:50
  //: joint g36 (w52) @(593, 230) /w:[ 1 2 4 -1 ]
  //: joint g24 (w65) @(334, 520) /w:[ 2 1 4 -1 ]
  concat g21 (.I0(w65), .I1(w67), .Z(w61));   //: @(457,515) /sn:0 /w:[ 3 1 5 ] /dr:0
  register mdr (.Q(w25), .D(Data), .EN(w21), .CLR(!w2), .CK(clk));   //: @(253,333) /R:1 /w:[ 0 5 1 17 25 ]
  //: joint g41 (PC) @(580, 168) /w:[ -1 1 2 14 ]
  concat g23 (.I0(w59), .I1(w60), .Z(w65));   //: @(349,497) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1
  //: supply0 g40 (w41) @(732,129) /sn:0 /w:[ 0 ]
  //: joint g54 (w19) @(265, 71) /w:[ 2 -1 4 1 ]
  //: joint g46 (w2) @(36, 114) /w:[ 11 12 -1 14 ]
  //: joint g45 (clk) @(458, 391) /w:[ 18 20 17 -1 ]
  //: joint g35 (w48) @(899, 225) /w:[ -1 4 6 3 ]
  concat g26 (.I0(w10), .I1(w50), .Z(w61));   //: @(505,495) /sn:0 /R:2 /w:[ 1 0 0 ] /dr:1
  //: supply1 g22 (w6) @(389,459) /sn:0 /w:[ 1 ]
  ALU g0 (.Op(Op), .B(B), .A(A), .over(w14), .zero(w13), .neg(w12), .Z(Z));   //: @(687, 199) /sz:(99, 92) /sn:0 /p:[ Ti0>1 Li0>1 Li1>1 Ro0<1 Ro1<1 Ro2<1 Ro3<5 ]
  //: switch reset (w2) @(-79,81) /w:[ 13 ] /st:0
  mux g18 (.I0(w4), .I1(w5), .I2(w61), .I3(w70), .S(w63), .Z(B));   //: @(641,289) /sn:0 /R:1 /w:[ 3 1 3 1 1 0 ]
  concat g12 (.I0(w65), .I1(w51), .Z(IR));   //: @(294,515) /sn:0 /R:2 /w:[ 5 1 7 ] /dr:1
  //: supply1 g33 (w37) @(848,167) /sn:0 /w:[ 0 ]
  //: comment g30 /dolink:0 /link:"" @(333,526) /sn:0
  //: /line:"sign-extend"
  //: /end
  //: joint g49 (clk) @(22, 125) /w:[ 2 -1 1 8 ]

endmodule

module reg32(CLR, DB, DA, CLK, WEN, WD, WA, SB, SA);
//: interface  /sz:(99, 111) /bd:[ Li0>CLK(99/111) Li1>CLR(89/111) Li2>WEN(40/111) Li3>WA[4:0](50/111) Li4>SB[4:0](19/111) Li5>SA[4:0](9/111) Li6>WD[31:0](63/111) Ro0<DA[31:0](31/111) Ro1<DB[31:0](72/111) ]
input [4:0] WA;    //: /sn:0 {0}(53,404)(65,404){1}
//: {2}(69,404)(82,404){3}
//: {4}(67,406)(67,436)(49,436)(49,451)(59,451){5}
supply1 w0;    //: /sn:0 {0}(33,-55)(33,-42)(166,-42)(166,-33){1}
input [31:0] WD;    //: /sn:0 {0}(518,185)(518,163)(294,163){1}
//: {2}(290,163)(140,163){3}
//: {4}(292,165)(292,184){5}
input [4:0] SB;    //: /sn:0 {0}(58,68)(83,68){1}
input CLR;    //: /sn:0 {0}(472,274)(451,274)(451,322)(235,322){1}
//: {2}(233,320)(233,273)(246,273){3}
//: {4}(231,322)(88,322){5}
input [4:0] SA;    //: /sn:0 {0}(74,-67)(102,-67){1}
supply1 w8;    //: /sn:0 {0}(19,84)(19,98)(167,98)(167,106){1}
input WEN;    //: /sn:0 {0}(69,485)(93,485){1}
output [31:0] DB;    //: /sn:0 /dp:1 {0}(550,298)(550,353){1}
//: {2}(552,355)(706,355){3}
//: {4}(548,355)(324,355)(324,297){5}
input CLK;    //: /sn:0 {0}(472,286)(461,286)(461,333)(241,333){1}
//: {2}(239,331)(239,285)(246,285){3}
//: {4}(237,333)(54,333){5}
output [31:0] DA;    //: /sn:0 /dp:1 {0}(280,297)(280,344)(504,344){1}
//: {2}(508,344)(705,344){3}
//: {4}(506,342)(506,298){5}
wire w6;    //: /sn:0 /dp:1 {0}(154,130)(137,130)(137,63)(89,63){1}
wire w7;    //: /sn:0 /dp:1 {0}(152,511)(120,511)(120,399)(88,399){1}
wire w4;    //: /sn:0 {0}(80,451)(86,451)(86,480)(93,480){1}
wire [3:0] w3;    //: /sn:0 {0}(246,194)(238,194)(238,-60){1}
//: {2}(240,-62)(467,-62)(467,195)(472,195){3}
//: {4}(236,-62)(108,-62){5}
wire w28;    //: /sn:0 {0}(181,521)(445,521)(445,260)(472,260){1}
wire w24;    //: /sn:0 {0}(183,140)(419,140)(419,233)(472,233){1}
wire w23;    //: /sn:0 {0}(183,120)(204,120)(204,232)(246,232){1}
wire w1;    //: /sn:0 /dp:1 {0}(153,-9)(144,-9)(144,-72)(108,-72){1}
wire w25;    //: /sn:0 {0}(114,483)(165,483)(165,487){1}
wire [3:0] w2;    //: /sn:0 {0}(89,73)(219,73){1}
//: {2}(223,73)(455,73)(455,207)(472,207){3}
//: {4}(221,75)(221,206)(246,206){5}
wire w12;    //: /sn:0 {0}(182,1)(431,1)(431,223)(472,223){1}
wire w27;    //: /sn:0 {0}(181,501)(227,501)(227,259)(246,259){1}
wire [3:0] w5;    //: /sn:0 {0}(88,409)(210,409){1}
//: {2}(214,409)(433,409)(433,250)(472,250){3}
//: {4}(212,407)(212,249)(246,249){5}
wire w9;    //: /sn:0 {0}(182,-19)(211,-19)(211,222)(246,222){1}
//: enddecls

  //: input g8 (CLR) @(86,322) /sn:0 /w:[ 5 ]
  //: joint g4 (DA) @(506, 344) /w:[ 2 4 1 -1 ]
  concat g13 (.I0(w3), .I1(w1), .Z(SA));   //: @(103,-67) /sn:0 /R:2 /w:[ 5 1 1 ] /dr:1
  //: output g3 (DB) @(703,355) /sn:0 /w:[ 3 ]
  //: output g2 (DA) @(702,344) /sn:0 /w:[ 3 ]
  reg16 g1 (.WD(WD), .SA(w3), .SB(w2), .ENA(w12), .ENB(w24), .WA(w5), .WEN(w28), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(473, 186) /sz:(103, 111) /sn:0 /p:[ Ti0>0 Li0>3 Li1>3 Li2>1 Li3>1 Li4>3 Li5>1 Li6>0 Li7>0 Bo0<5 Bo1<0 ]
  demux g16 (.I(w1), .E(w0), .Z0(w9), .Z1(w12));   //: @(166,-9) /sn:0 /R:1 /w:[ 0 1 0 0 ]
  //: joint g11 (CLK) @(239, 333) /w:[ 1 2 4 -1 ]
  and g28 (.I0(w4), .I1(WEN), .Z(w25));   //: @(104,483) /sn:0 /w:[ 1 1 0 ]
  //: input g10 (CLK) @(52,333) /sn:0 /w:[ 5 ]
  //: joint g32 (WA) @(67, 404) /w:[ 2 -1 1 4 ]
  //: input g27 (WEN) @(67,485) /sn:0 /w:[ 0 ]
  concat g19 (.I0(w2), .I1(w6), .Z(SB));   //: @(84,68) /sn:0 /R:2 /w:[ 0 1 1 ] /dr:1
  //: input g6 (WD) @(138,163) /sn:0 /w:[ 3 ]
  //: joint g9 (CLR) @(233, 322) /w:[ 1 2 4 -1 ]
  //: joint g7 (WD) @(292, 163) /w:[ 1 -1 2 4 ]
  or g31 (.I0(WA), .Z(w4));   //: @(70,451) /sn:0 /w:[ 5 0 ]
  //: joint g20 (w5) @(212, 409) /w:[ 2 4 1 -1 ]
  //: supply1 g15 (w0) @(44,-55) /sn:0 /w:[ 0 ]
  demux g29 (.I(w7), .E(w25), .Z0(w27), .Z1(w28));   //: @(165,511) /sn:0 /R:1 /w:[ 0 1 0 0 ]
  concat g25 (.I0(w5), .I1(w7), .Z(WA));   //: @(83,404) /sn:0 /R:2 /w:[ 0 1 3 ] /dr:1
  //: joint g17 (w2) @(221, 73) /w:[ 2 -1 1 4 ]
  //: joint g5 (DB) @(550, 355) /w:[ 2 1 4 -1 ]
  //: joint g14 (w3) @(238, -62) /w:[ 2 -1 4 1 ]
  //: input g24 (WA) @(51,404) /sn:0 /w:[ 0 ]
  demux g21 (.I(w6), .E(w8), .Z0(w23), .Z1(w24));   //: @(167,130) /sn:0 /R:1 /w:[ 0 1 0 0 ]
  reg16 g0 (.WD(WD), .SA(w3), .SB(w2), .ENA(w9), .ENB(w23), .WA(w5), .WEN(w27), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(247, 185) /sz:(103, 111) /sn:0 /p:[ Ti0>5 Li0>0 Li1>5 Li2>1 Li3>1 Li4>5 Li5>1 Li6>3 Li7>3 Bo0<0 Bo1<5 ]
  //: supply1 g22 (w8) @(30,84) /sn:0 /w:[ 0 ]
  //: input g18 (SB) @(56,68) /sn:0 /w:[ 0 ]
  //: input g12 (SA) @(72,-67) /sn:0 /w:[ 0 ]
  //: comment g33 /dolink:0 /link:"" @(5,524) /sn:0
  //: /line:"no writing to $0"
  //: /end

endmodule

module reg16(DA, ENA, SA, WD, DB, ENB, CLR, SB, WEN, CLK, WA);
//: interface  /sz:(103, 111) /bd:[ Ti0>WD[31:0](45/103) Li0>CLK(100/111) Li1>CLR(88/111) Li2>WEN(74/111) Li3>WA[3:0](64/111) Li4>ENB(47/111) Li5>ENA(37/111) Li6>SB[3:0](21/111) Li7>SA[3:0](9/111) Bo0<DB[31:0](77/103) Bo1<DA[31:0](33/103) ]
input ENB;    //: /sn:0 {0}(-22,52)(26,52)(26,56){1}
input [3:0] WA;    //: /sn:0 {0}(4,384)(37,384){1}
input [31:0] WD;    //: /sn:0 {0}(665,141)(665,124)(520,124){1}
//: {2}(516,124)(362,124){3}
//: {4}(358,124)(205,124){5}
//: {6}(201,124)(39,124){7}
//: {8}(203,126)(203,140){9}
//: {10}(360,126)(360,140){11}
//: {12}(518,126)(518,140){13}
input [3:0] SB;    //: /sn:0 {0}(-84,10)(-52,10){1}
input CLR;    //: /sn:0 {0}(615,233)(608,233)(608,291)(463,291){1}
//: {2}(461,289)(461,232)(468,232){3}
//: {4}(459,291)(305,291){5}
//: {6}(303,289)(303,232)(310,232){7}
//: {8}(301,291)(145,291){9}
//: {10}(143,289)(143,232)(153,232){11}
//: {12}(141,291)(41,291){13}
input [3:0] SA;    //: /sn:0 {0}(-57,-126)(-39,-126){1}
input WEN;    //: /sn:0 {0}(55,435)(87,435)(87,442){1}
output [31:0] DB;    //: /sn:0 /dp:1 {0}(232,251)(232,320)(387,320){1}
//: {2}(391,320)(545,320){3}
//: {4}(549,320)(692,320){5}
//: {6}(696,320)(768,320){7}
//: {8}(694,318)(694,252){9}
//: {10}(547,318)(547,251){11}
//: {12}(389,318)(389,251){13}
input CLK;    //: /sn:0 {0}(615,243)(612,243)(612,309)(467,309){1}
//: {2}(465,307)(465,242)(468,242){3}
//: {4}(463,309)(310,309){5}
//: {6}(308,307)(308,242)(310,242){7}
//: {8}(306,309)(151,309){9}
//: {10}(149,307)(149,242)(153,242){11}
//: {12}(147,309)(41,309){13}
output [31:0] DA;    //: /sn:0 /dp:1 {0}(184,251)(184,282)(339,282){1}
//: {2}(343,282)(497,282){3}
//: {4}(501,282)(644,282){5}
//: {6}(648,282)(767,282){7}
//: {8}(646,280)(646,252){9}
//: {10}(499,280)(499,251){11}
//: {12}(341,280)(341,251){13}
input ENA;    //: /sn:0 {0}(-45,-100)(24,-100)(24,-93){1}
wire w6;    //: /sn:0 {0}(42,62)(114,62)(114,187)(153,187){1}
wire w14;    //: /sn:0 {0}(42,74)(272,74)(272,187)(310,187){1}
wire w16;    //: /sn:0 {0}(103,460)(299,460)(299,213)(310,213){1}
wire w4;    //: /sn:0 {0}(103,448)(138,448)(138,213)(153,213){1}
wire [1:0] w31;    //: /sn:0 /dp:1 {0}(11,-69)(-1,-69)(-1,-131)(-33,-131){1}
wire w23;    //: /sn:0 {0}(42,86)(427,86)(427,187)(468,187){1}
wire [1:0] w1;    //: /sn:0 /dp:1 {0}(74,466)(67,466)(67,379)(43,379){1}
wire w25;    //: /sn:0 {0}(42,98)(580,98)(580,188)(615,188){1}
wire [1:0] w40;    //: /sn:0 /dp:1 {0}(13,80)(-2,80)(-2,5)(-46,5){1}
wire w8;    //: /sn:0 {0}(40,-87)(124,-87)(124,176)(153,176){1}
wire w22;    //: /sn:0 {0}(103,472)(457,472)(457,213)(468,213){1}
wire [1:0] w2;    //: /sn:0 {0}(-46,15)(133,15){1}
//: {2}(137,15)(290,15){3}
//: {4}(294,15)(444,15){5}
//: {6}(448,15)(606,15)(606,163)(615,163){7}
//: {8}(446,17)(446,162)(468,162){9}
//: {10}(292,17)(292,162)(310,162){11}
//: {12}(135,17)(135,162)(153,162){13}
wire w12;    //: /sn:0 {0}(40,-51)(588,-51)(588,177)(615,177){1}
wire [1:0] w11;    //: /sn:0 /dp:1 {0}(43,389)(118,389){1}
//: {2}(122,389)(284,389){3}
//: {4}(288,389)(442,389){5}
//: {6}(446,389)(593,389)(593,203)(615,203){7}
//: {8}(444,387)(444,202)(468,202){9}
//: {10}(286,387)(286,202)(310,202){11}
//: {12}(120,387)(120,202)(153,202){13}
wire w10;    //: /sn:0 {0}(40,-63)(437,-63)(437,176)(468,176){1}
wire w27;    //: /sn:0 {0}(103,484)(602,484)(602,214)(615,214){1}
wire [1:0] w13;    //: /sn:0 {0}(468,150)(459,150)(459,-119){1}
//: {2}(461,-121)(611,-121)(611,151)(615,151){3}
//: {4}(457,-121)(305,-121){5}
//: {6}(301,-121)(149,-121){7}
//: {8}(145,-121)(-33,-121){9}
//: {10}(147,-119)(147,150)(153,150){11}
//: {12}(303,-119)(303,150)(310,150){13}
wire w9;    //: /sn:0 {0}(40,-75)(283,-75)(283,176)(310,176){1}
//: enddecls

  //: output g8 (DA) @(764,282) /sn:0 /w:[ 7 ]
  reg4 g4 (.WD(WD), .SA(w13), .SB(w2), .ENA(w12), .ENB(w25), .WA(w11), .WEN(w27), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(616, 142) /sz:(102, 109) /sn:0 /p:[ Ti0>0 Li0>3 Li1>7 Li2>1 Li3>1 Li4>7 Li5>1 Li6>0 Li7>0 Bo0<9 Bo1<9 ]
  //: input g13 (ENA) @(-47,-100) /sn:0 /w:[ 0 ]
  //: input g34 (SA) @(-59,-126) /sn:0 /w:[ 0 ]
  reg4 g3 (.WD(WD), .SA(w13), .SB(w2), .ENA(w10), .ENB(w23), .WA(w11), .WEN(w22), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(469, 141) /sz:(102, 109) /sn:0 /p:[ Ti0>13 Li0>0 Li1>9 Li2>1 Li3>1 Li4>9 Li5>1 Li6>3 Li7>3 Bo0<11 Bo1<11 ]
  //: joint g37 (w13) @(147, -121) /w:[ 7 -1 8 10 ]
  reg4 g2 (.WD(WD), .SA(w13), .SB(w2), .ENA(w9), .ENB(w14), .WA(w11), .WEN(w16), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(311, 141) /sz:(102, 109) /sn:0 /p:[ Ti0>11 Li0>13 Li1>11 Li2>1 Li3>1 Li4>11 Li5>1 Li6>7 Li7>7 Bo0<13 Bo1<13 ]
  //: input g1 (WD) @(37,124) /sn:0 /w:[ 7 ]
  //: output g16 (DB) @(765,320) /sn:0 /w:[ 7 ]
  //: joint g11 (DA) @(499, 282) /w:[ 4 10 3 -1 ]
  //: joint g10 (DB) @(694, 320) /w:[ 6 8 5 -1 ]
  concat g28 (.I0(w11), .I1(w1), .Z(WA));   //: @(38,384) /sn:0 /R:2 /w:[ 0 1 1 ] /dr:1
  demux g32 (.I(w1), .E(WEN), .Z0(w4), .Z1(w16), .Z2(w22), .Z3(w27));   //: @(87,466) /sn:0 /R:1 /w:[ 0 1 0 0 0 0 ]
  //: joint g27 (CLK) @(465, 309) /w:[ 1 2 4 -1 ]
  //: joint g19 (DB) @(389, 320) /w:[ 2 12 1 -1 ]
  //: input g38 (ENB) @(-24,52) /sn:0 /w:[ 0 ]
  //: joint g6 (WD) @(360, 124) /w:[ 3 -1 4 10 ]
  //: joint g9 (DA) @(646, 282) /w:[ 6 8 5 -1 ]
  //: joint g7 (WD) @(518, 124) /w:[ 1 -1 2 12 ]
  //: input g20 (CLR) @(39,291) /sn:0 /w:[ 13 ]
  //: joint g15 (w11) @(286, 389) /w:[ 4 10 3 -1 ]
  //: joint g31 (w11) @(120, 389) /w:[ 2 12 1 -1 ]
  //: input g39 (SB) @(-86,10) /sn:0 /w:[ 0 ]
  //: joint g43 (w2) @(446, 15) /w:[ 6 -1 5 8 ]
  //: input g29 (WEN) @(53,435) /sn:0 /w:[ 0 ]
  //: joint g25 (CLK) @(149, 309) /w:[ 9 10 12 -1 ]
  //: joint g17 (w13) @(459, -121) /w:[ 2 -1 4 1 ]
  //: joint g42 (w2) @(292, 15) /w:[ 4 -1 3 10 ]
  demux g14 (.I(w31), .E(ENA), .Z0(w8), .Z1(w9), .Z2(w10), .Z3(w12));   //: @(24,-69) /sn:0 /R:1 /w:[ 0 1 0 0 0 0 ]
  //: joint g5 (WD) @(203, 124) /w:[ 5 -1 6 8 ]
  //: joint g44 (w11) @(444, 389) /w:[ 6 8 5 -1 ]
  //: input g24 (CLK) @(39,309) /sn:0 /w:[ 13 ]
  //: joint g21 (CLR) @(143, 291) /w:[ 9 10 12 -1 ]
  //: joint g36 (w13) @(303, -121) /w:[ 5 -1 6 12 ]
  //: joint g23 (CLR) @(461, 291) /w:[ 1 2 4 -1 ]
  //: joint g41 (w2) @(135, 15) /w:[ 2 -1 1 12 ]
  concat g40 (.I0(w2), .I1(w40), .Z(SB));   //: @(-51,10) /sn:0 /R:2 /w:[ 0 1 1 ] /dr:1
  concat g35 (.I0(w13), .I1(w31), .Z(SA));   //: @(-38,-126) /sn:0 /R:2 /w:[ 9 1 1 ] /dr:1
  //: joint g26 (CLK) @(308, 309) /w:[ 5 6 8 -1 ]
  //: joint g22 (CLR) @(303, 291) /w:[ 5 6 8 -1 ]
  reg4 g0 (.WD(WD), .SA(w13), .SB(w2), .ENA(w8), .ENB(w6), .WA(w11), .WEN(w4), .CLR(CLR), .CLK(CLK), .DA(DA), .DB(DB));   //: @(154, 141) /sz:(102, 109) /sn:0 /p:[ Ti0>9 Li0>11 Li1>13 Li2>1 Li3>1 Li4>13 Li5>1 Li6>11 Li7>11 Bo0<0 Bo1<0 ]
  //: joint g18 (DB) @(547, 320) /w:[ 4 10 3 -1 ]
  //: joint g12 (DA) @(341, 282) /w:[ 2 12 1 -1 ]
  demux g33 (.I(w40), .E(ENB), .Z0(w6), .Z1(w14), .Z2(w23), .Z3(w25));   //: @(26,80) /sn:0 /R:1 /w:[ 0 1 0 0 0 0 ]
  //: input g30 (WA) @(2,384) /sn:0 /w:[ 0 ]

endmodule